| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_dpp_cm.c | 55 dpp->tf_shift->field_name, dpp->tf_mask->field_name
123 gam_regs.shifts.csc_c11 = dpp->tf_shift->CM_GAMUT_REMAP_C11;
125 gam_regs.shifts.csc_c12 = dpp->tf_shift->CM_GAMUT_REMAP_C12;
218 gam_regs.shifts.csc_c11 = dpp->tf_shift->CM_OCSC_C11;
220 gam_regs.shifts.csc_c12 = dpp->tf_shift->CM_OCSC_C12;
265 reg->shifts.exp_region0_lut_offset = dpp->tf_shift->CM_RGAM_RAMA_EXP_REGION0_LUT_OFFSET;
267 reg->shifts.exp_region0_num_segments = dpp->tf_shift->CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS;
269 reg->shifts.exp_region1_lut_offset = dpp->tf_shift->CM_RGAM_RAMA_EXP_REGION1_LUT_OFFSET;
271 reg->shifts.exp_region1_num_segments = dpp->tf_shift->CM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTS;
274 reg->shifts.field_region_end = dpp->tf_shift->CM_RGAM_RAMB_EXP_REGION_END_B
[all...] |
| amdgpu_dcn10_dpp.c | 54 dpp->tf_shift->field_name, dpp->tf_mask->field_name
565 const struct dcn_dpp_shift *tf_shift,
575 dpp->tf_shift = tf_shift;
|
| amdgpu_dcn10_dpp_dscl.c | 55 dpp->tf_shift->field_name, dpp->tf_mask->field_name
388 dpp->tf_shift->SCL_COEF_RAM_SELECT_CURRENT);
|
| amdgpu_dcn10_resource.c | 404 static const struct dcn_dpp_shift tf_shift = { variable in typeref:typename:const struct dcn_dpp_shift
633 &tf_regs[inst], &tf_shift, &tf_mask);
|
| dcn10_dpp.h | 1350 const struct dcn_dpp_shift *tf_shift; member in struct:dcn10_dpp
1514 const struct dcn_dpp_shift *tf_shift,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_dpp_cm.c | 52 dpp->tf_shift->field_name, dpp->tf_mask->field_name
194 gam_regs.shifts.csc_c11 = dpp->tf_shift->CM_GAMUT_REMAP_C11;
196 gam_regs.shifts.csc_c12 = dpp->tf_shift->CM_GAMUT_REMAP_C12;
289 icsc_regs.shifts.csc_c11 = dpp->tf_shift->CM_ICSC_C11;
291 icsc_regs.shifts.csc_c12 = dpp->tf_shift->CM_ICSC_C12;
367 reg->shifts.exp_region0_lut_offset = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET;
369 reg->shifts.exp_region0_num_segments = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS;
371 reg->shifts.exp_region1_lut_offset = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET;
373 reg->shifts.exp_region1_num_segments = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS;
376 reg->shifts.field_region_end = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION_END_B
[all...] |
| amdgpu_dcn20_dpp.c | 54 dpp->tf_shift->field_name, dpp->tf_mask->field_name
497 const struct dcn2_dpp_shift *tf_shift,
507 dpp->tf_shift = tf_shift;
|
| dcn20_dpp.h | 686 const struct dcn2_dpp_shift *tf_shift; member in struct:dcn20_dpp
776 const struct dcn2_dpp_shift *tf_shift,
|
| amdgpu_dcn20_resource.c | 658 static const struct dcn2_dpp_shift tf_shift = { variable in typeref:typename:const struct dcn2_dpp_shift
986 &tf_regs[inst], &tf_shift, &tf_mask))
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| amdgpu_dcn21_resource.c | 631 static const struct dcn2_dpp_shift tf_shift = { variable in typeref:typename:const struct dcn2_dpp_shift
702 &tf_regs[inst], &tf_shift, &tf_mask))
|
