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    Searched refs:ttbr (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/arch/aarch64/aarch64/
aarch64_tlb.c 55 const uint64_t ttbr = local in function:tlb_set_asid
59 cpu_set_ttbr0(ttbr);
pmapboot.c 218 int ttbr __unused;
258 ttbr = 0;
263 ttbr = 1;
287 PMAPBOOT_DPRINTF("TTBR%d[%d] (new)\t= %016lx:",
288 ttbr, idx0, pte);
316 PMAPBOOT_DPRINTF("TTBR%d[%d][%d]\t= %016lx:", ttbr,
332 PMAPBOOT_DPRINTF("TTBR%d[%d][%d] (new)\t= %016lx:",
333 ttbr, idx0, idx1, pte);
360 PMAPBOOT_DPRINTF("TTBR%d[%d][%d][%d]\t= %016lx:", ttbr
    [all...]
db_interface.c 466 uint64_t ttbr; variable in typeref:typename:uint64_t
473 ttbr = reg_ttbr1_el1_read();
477 ttbr = reg_ttbr0_el1_read();
483 pa = ttbr & TTBR_BADDR;
489 pr("TTBR%d=%016"PRIx64", pa=%016"PRIxPADDR", va=%p",
490 user ? 0 : 1, ttbr, pa, l0);
pmap_machdep.c 544 const uint64_t ttbr = local in function:pmap_md_xtab_activate
548 cpu_set_ttbr0(ttbr);
  /src/sys/arch/arm/include/
armreg.h 819 ARMREG_READ_INLINE(ttbr, "p15,0,%0,c2,c0,0") /* Translation Table Base Register 0 */
820 ARMREG_WRITE_INLINE(ttbr, "p15,0,%0,c2,c0,0") /* Translation Table Base Register 0 */

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