| /src/tests/usr.bin/xlint/lint1/ |
| msg_222.c | 14 unsigned int u32; variable in typeref:typename:unsigned int
23 u32 = !-8;
24 u32 = ~-8;
26 u32 = +-8;
27 u32 = - -8;
30 u32 = u32 * -8;
32 u32 = -8 * u32;
34 u32 = u32 / -8
[all...] |
| msg_381.c | 9 unsigned int u32; variable in typeref:typename:unsigned int
26 u32 = -1.0;
27 u32 = -0.0;
28 u32 = 0.0;
30 u32 = 3.141;
31 u32 = 4294967295.0;
33 u32 = 4294967296.0;
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| cayman_blit_shaders.h | 30 extern const u32 cayman_ps[];
31 extern const u32 cayman_vs[];
32 extern const u32 cayman_default_state[];
34 extern const u32 cayman_ps_size, cayman_vs_size;
35 extern const u32 cayman_default_size;
|
| evergreen_blit_shaders.h | 30 extern const u32 evergreen_ps[];
31 extern const u32 evergreen_vs[];
32 extern const u32 evergreen_default_state[];
34 extern const u32 evergreen_ps_size, evergreen_vs_size;
35 extern const u32 evergreen_default_size;
|
| r600_blit_shaders.h | 31 extern const u32 r6xx_ps[];
32 extern const u32 r6xx_vs[];
33 extern const u32 r7xx_default_state[];
34 extern const u32 r6xx_default_state[];
37 extern const u32 r6xx_ps_size, r6xx_vs_size;
38 extern const u32 r6xx_default_size, r7xx_default_size;
|
| cik_blit_shaders.h | 30 extern const u32 cik_default_state[];
32 extern const u32 cik_default_size;
|
| si_blit_shaders.h | 30 extern const u32 si_default_state[];
32 extern const u32 si_default_size;
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvfw/ |
| flcn.h | 10 u32 dma_idx;
11 u32 code_dma_base;
12 u32 code_size_total;
13 u32 code_size_to_load;
14 u32 code_entry_point;
15 u32 data_dma_base;
16 u32 data_size;
17 u32 overlay_dma_base;
18 u32 argc;
19 u32 argv
[all...] |
| ls.h | 10 u32 descriptor_size;
11 u32 image_size;
12 u32 tools_version;
13 u32 app_version;
15 u32 bootloader_start_offset;
16 u32 bootloader_size;
17 u32 bootloader_imem_offset;
18 u32 bootloader_entry_point;
19 u32 app_start_offset;
20 u32 app_size
[all...] |
| fw.h | 10 u32 bin_magic;
11 u32 bin_ver;
12 u32 bin_size;
13 u32 header_offset;
14 u32 data_offset;
15 u32 data_size;
21 u32 start_tag;
22 u32 dmem_load_off;
23 u32 code_off;
24 u32 code_size
[all...] |
| acr.h | 8 u32 falcon_id;
9 u32 lsb_offset;
10 u32 bootstrap_owner;
11 u32 lazy_bootstrap;
19 u32 status;
26 u32 falcon_id;
27 u32 lsb_offset;
28 u32 bootstrap_owner;
29 u32 lazy_bootstrap;
30 u32 bin_version
[all...] |
| hs.h | 10 u32 sig_dbg_offset;
11 u32 sig_dbg_size;
12 u32 sig_prod_offset;
13 u32 sig_prod_size;
14 u32 patch_loc;
15 u32 patch_sig;
16 u32 hdr_offset;
17 u32 hdr_size;
23 u32 non_sec_code_off;
24 u32 non_sec_code_size
[all...] |
| /src/sys/dev/pci/ixgbe/ |
| ixgbe_features.h | 47 #define IXGBE_FEATURE_VF (u32)(1 << 0)
48 #define IXGBE_FEATURE_SRIOV (u32)(1 << 1)
49 #define IXGBE_FEATURE_RSS (u32)(1 << 2)
50 #define IXGBE_FEATURE_NETMAP (u32)(1 << 3)
51 #define IXGBE_FEATURE_FAN_FAIL (u32)(1 << 4)
52 #define IXGBE_FEATURE_TEMP_SENSOR (u32)(1 << 5)
53 #define IXGBE_FEATURE_BYPASS (u32)(1 << 6)
54 #define IXGBE_FEATURE_LEGACY_TX (u32)(1 << 7)
55 #define IXGBE_FEATURE_FDIR (u32)(1 << 8)
56 #define IXGBE_FEATURE_MSI (u32)(1 << 9
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/gvt/ |
| execlist.h | 44 u32 ldw;
46 u32 valid : 1;
47 u32 force_pd_restore : 1;
48 u32 force_restore : 1;
49 u32 addressing_mode : 2;
50 u32 llc_coherency : 1;
51 u32 fault_handling : 2;
52 u32 privilege_access : 1;
53 u32 reserved : 3;
54 u32 lrca : 20
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/i2c/ |
| priv.h | 23 void (*aux_stat)(struct nvkm_i2c *, u32 *, u32 *, u32 *, u32 *);
27 void (*aux_mask)(struct nvkm_i2c *, u32, u32, u32);
30 void g94_aux_stat(struct nvkm_i2c *, u32 *, u32 *, u32 *, u32 *)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/bios/ |
| npde.h | 7 u32 image_size;
11 u32 nvbios_npdeTe(struct nvkm_bios *, u32);
12 u32 nvbios_npdeTp(struct nvkm_bios *, u32, struct nvbios_npdeT *);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/disp/ |
| hdmi.h | 9 u32 header;
10 u32 subpack0_low;
11 u32 subpack0_high;
12 u32 subpack1_low;
13 u32 subpack1_high;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_pll.h | 30 u32 freq,
31 u32 *dot_clock_p,
32 u32 *fb_div_p,
33 u32 *frac_fb_div_p,
34 u32 *ref_div_p,
35 u32 *post_div_p);
36 u32 amdgpu_pll_get_use_mask(struct drm_crtc *crtc);
|
| cik.h | 32 u32 me, u32 pipe, u32 queue, u32 vmid);
|
| si.h | 32 u32 me, u32 pipe, u32 queue, u32 vmid);
|
| vi.h | 32 u32 me, u32 pipe, u32 queue, u32 vmid);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/ |
| nouveau_usif.h | 10 int usif_ioctl(struct drm_file *, void *, u32);
12 int usif_ioctl(struct drm_file *, void __user *, u32);
14 int usif_notify(const void *, u32, const void *, u32);
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| intel_ring_types.h | 23 #define CACHELINE_DWORDS (CACHELINE_BYTES / sizeof(u32))
44 u32 head; /* updated during retire, loosely tracks RING_HEAD */
45 u32 tail; /* updated on submission, used for RING_TAIL */
46 u32 emit; /* updated during request construction */
48 u32 space;
49 u32 size;
50 u32 wrap;
51 u32 effective_size;
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/fifo/ |
| user.h | 6 int gv100_fifo_user_new(const struct nvkm_oclass *, void *, u32,
8 int tu102_fifo_user_new(const struct nvkm_oclass *, void *, u32,
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/therm/ |
| gf100.h | 33 u32 fecs;
34 u32 hubmmu;
|
