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  /src/external/gpl3/gdb.old/dist/sim/bfin/
dv-bfin_uart.c 1 /* Blackfin Universal Asynchronous Receiver/Transmitter (UART) model.
69 static const char *mmr_name (struct bfin_uart *uart, bu32 idx)
71 if (uart->lcr & DLAB)
76 #define mmr_name(off) mmr_name (uart, (off) / 4)
81 struct bfin_uart *uart = data; local
84 uart->handler = NULL;
96 struct bfin_uart *uart = hw_data (me); local
98 if (uart->ier & ERBFI)
100 if (!uart->handler)
101 uart->handler = hw_event_queue_schedule (me, 10000
117 struct bfin_uart *uart = hw_data (me); local
137 struct bfin_uart *uart = hw_data (me); local
198 struct bfin_uart *uart = hw_data (me); local
240 struct bfin_uart *uart = hw_data (me); local
262 struct bfin_uart *uart = hw_data (me); local
318 struct bfin_uart *uart = hw_data (me); local
378 struct bfin_uart *uart = hw_data (me); local
430 struct bfin_uart *uart; local
    [all...]
dv-bfin_uart2.c 1 /* Blackfin Universal Asynchronous Receiver/Transmitter (UART) model.
75 struct bfin_uart *uart = hw_data (me); local
85 mmr_off = addr - uart->base;
86 valuep = (void *)((uintptr_t)uart + mmr_base() + mmr_off);
95 uart->thr = bfin_uart_write_byte (me, value, uart->mcr);
96 if (uart->ier & ETBEI)
100 uart->ier |= value;
103 dv_w1c_2 (&uart->ier, value, -1);
134 struct bfin_uart *uart = hw_data (me) local
194 struct bfin_uart *uart = hw_data (me); local
246 struct bfin_uart *uart; local
    [all...]
  /src/external/gpl3/gdb/dist/sim/bfin/
dv-bfin_uart.c 1 /* Blackfin Universal Asynchronous Receiver/Transmitter (UART) model.
69 static const char *mmr_name (struct bfin_uart *uart, bu32 idx)
71 if (uart->lcr & DLAB)
76 #define mmr_name(off) mmr_name (uart, (off) / 4)
81 struct bfin_uart *uart = data; local
84 uart->handler = NULL;
96 struct bfin_uart *uart = hw_data (me); local
98 if (uart->ier & ERBFI)
100 if (!uart->handler)
101 uart->handler = hw_event_queue_schedule (me, 10000
117 struct bfin_uart *uart = hw_data (me); local
137 struct bfin_uart *uart = hw_data (me); local
198 struct bfin_uart *uart = hw_data (me); local
240 struct bfin_uart *uart = hw_data (me); local
262 struct bfin_uart *uart = hw_data (me); local
318 struct bfin_uart *uart = hw_data (me); local
378 struct bfin_uart *uart = hw_data (me); local
430 struct bfin_uart *uart; local
    [all...]
dv-bfin_uart2.c 1 /* Blackfin Universal Asynchronous Receiver/Transmitter (UART) model.
75 struct bfin_uart *uart = hw_data (me); local
85 mmr_off = addr - uart->base;
86 valuep = (void *)((uintptr_t)uart + mmr_base() + mmr_off);
95 uart->thr = bfin_uart_write_byte (me, value, uart->mcr);
96 if (uart->ier & ETBEI)
100 uart->ier |= value;
103 dv_w1c_2 (&uart->ier, value, -1);
134 struct bfin_uart *uart = hw_data (me) local
194 struct bfin_uart *uart = hw_data (me); local
246 struct bfin_uart *uart; local
    [all...]
  /src/external/gpl3/gdb.old/dist/sim/lm32/
dv-lm32uart.c 1 /* Lattice Mico32 UART model.
34 unsigned base; /* Base address of this UART. */
35 unsigned limit; /* Limit address of this UART. */
48 /* UART registers. */
75 /* UART ports. */
90 struct lm32uart *uart = hw_data (me); local
94 if (uart->ier & LM32_UART_IER_TX_INT)
101 uart->iir = MICOUART_IIR_TXRDY;
104 uart->lsr |= LM32_UART_LSR_TX_RDY;
107 c = (char) uart->thr
130 struct lm32uart *uart = hw_data (me); local
207 struct lm32uart *uart = hw_data (me); local
294 struct lm32uart *uart; local
    [all...]
  /src/external/gpl3/gdb/dist/sim/lm32/
dv-lm32uart.c 1 /* Lattice Mico32 UART model.
34 unsigned base; /* Base address of this UART. */
35 unsigned limit; /* Limit address of this UART. */
48 /* UART registers. */
75 /* UART ports. */
90 struct lm32uart *uart = hw_data (me); local
94 if (uart->ier & LM32_UART_IER_TX_INT)
101 uart->iir = MICOUART_IIR_TXRDY;
104 uart->lsr |= LM32_UART_LSR_TX_RDY;
107 c = (char) uart->thr
130 struct lm32uart *uart = hw_data (me); local
207 struct lm32uart *uart = hw_data (me); local
294 struct lm32uart *uart; local
    [all...]
  /src/usr.bin/scmdctl/
Makefile 5 SRCS= scmdctl.c uart.c i2cspi.c printscmd.c common.c
  /src/sys/arch/mips/atheros/
ar_console.c 83 volatile uint32_t * const uart = local
86 while (!(uart[com_lsr] & htobe32(LSR_TXRDY)))
89 uart[com_data] = htobe32(c);
95 volatile uint32_t * const uart = local
98 while (!(uart[com_lsr] & htobe32(LSR_RXRDY)))
101 return (uint8_t) be32toh(uart[com_data]);
107 volatile uint32_t * const uart = local
110 while (!(uart[com_lsr] & htobe32(LSR_TSRE)))
  /src/external/gpl3/gdb.old/dist/sim/m32r/
dv-m32r_uart.c 0 /* UART model.
102 attach_m32r_uart_regs (struct hw *me, struct m32r_uart *uart)
127 struct m32r_uart *uart; local
129 uart = HW_ZALLOC (me, struct m32r_uart);
131 set_hw_data (me, uart);
135 attach_m32r_uart_regs (me, uart);
  /src/external/gpl3/gdb/dist/sim/m32r/
dv-m32r_uart.c 0 /* UART model.
102 attach_m32r_uart_regs (struct hw *me, struct m32r_uart *uart)
127 struct m32r_uart *uart; local
129 uart = HW_ZALLOC (me, struct m32r_uart);
131 set_hw_data (me, uart);
135 attach_m32r_uart_regs (me, uart);
  /src/sys/arch/hpc/stand/hpcboot/arm/
arm_sa1100.cpp 125 #define TBY VOLATILE_REF(uart + 0x20)
126 #define UTDR VOLATILE_REF(uart + 0x14)
134 vaddr_t uart = local
138 _mem->unmapPhysicalPage(uart);
arm_pxa2x0.cpp 100 DPRINTF((TEXT("Testing UART.\n")));
127 #define COM_DATA VOLATILE_REF8(uart + 0x00)
128 #define COM_IIR VOLATILE_REF8(uart + 0x08)
129 #define COM_LSR VOLATILE_REF8(uart + 0x14)
142 vaddr_t uart = local
145 // Don't turn on the enable-UART bit in the IER; this seems to
153 _mem->unmapPhysicalPage(uart);
  /src/sys/arch/evbppc/sam460ex/
machdep.c 184 volatile uint8_t *uart = (volatile uint8_t *)AMCC460EX_UART0_BASE; local
186 while ((uart[com_lsr] & LSR_TXRDY) == 0)
188 uart[com_data] = c;
194 volatile uint8_t *uart = (volatile uint8_t *)AMCC460EX_UART0_BASE; local
196 while ((uart[com_lsr] & LSR_RXRDY) == 0)
198 return uart[com_data];
326 * UART input clock for the console and com devices.
520 printf("sam460ex: fdt cpu %u Hz, opb %u Hz, uart %u Hz, mem %u MB\n",
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/allwinner/
sun8i-h3-nanopi-neo-air.dts 125 uart-has-rtscts;
sunxi-bananapi-m2-plus.dtsi 218 uart-has-rtscts;
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/nxp/imx/
imx6ul-tx6ul-mainboard.dts 149 /delete-property/ uart-has-rtscts;
154 /delete-property/ uart-has-rtscts;
imx6q-pistachio.dts 590 uart-has-rtscts;
598 uart-has-rtscts;
605 uart-has-rtscts;
612 uart-has-rtscts;
619 uart-has-rtscts;
imx6qdl-sr-som-brcm.dtsi 129 uart-has-rtscts;
imx6qdl-sr-som-ti.dtsi 136 uart-has-rtscts;
imx6sl-warp.dts 88 uart-has-rtscts;
imx53-tx53.dtsi 551 uart-has-rtscts;
558 uart-has-rtscts;
565 uart-has-rtscts;
  /src/sys/arch/ia64/include/
dig64.h 182 #define DIG64_ENTRYTYPE_TYPE0 0 /* (UART | Bidirect) */
183 #define DIG64_ENTRYTYPE_TYPE1 1 /* (UART | Debug Port) */
191 struct dig64_hcdp_entry uart; member in union:dig64_hcdp_table::dev_desc
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/st/
stm32h750i-art-pi.dts 211 uart-has-rtscts;
  /src/sys/arch/ia64/ia64/
consinit.c 167 struct dig64_hcdp_entry *ent = &desc->uart;
  /src/sys/arch/mips/adm5120/dev/
uart.c 1 /* $NetBSD: uart.c,v 1.12 2014/07/25 08:10:34 dholland Exp $ */
35 __KERNEL_RCSID(0, "$NetBSD: uart.c,v 1.12 2014/07/25 08:10:34 dholland Exp $");
52 #include <mips/adm5120/dev/uart.h>
110 CFATTACH_DECL_NEW(uart, sizeof(struct uart_softc),

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