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    Searched refs:ucFlag (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_atombios_i2c.c 90 args.ucFlag = flags;
176 args.ucFlag = 1;
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_atombios_i2c.c 82 args.ucFlag = flags;
atombios.h 4481 UCHAR ucFlag; // bit0=0 :step is 1mv =1 0.5mv
6471 UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineon member in struct:_ATOM_MEMORY_TIMING_FORMAT::__anon5f729c6a1d0a::__anon5f729c6a1e08
6498 UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineon member in struct:_ATOM_MEMORY_TIMING_FORMAT_V1
6531 UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineon member in struct:_ATOM_MEMORY_TIMING_FORMAT_V2
6586 UCHAR ucFlag; // To enable/disable functionalities based on memory type
6609 UCHAR ucFlag; // To enable/disable functionalities based on memory type
6651 UCHAR ucFlag; // To enable/disable functionalities based on memory type
6682 UCHAR ucFlag; // To enable/disable functionalities based on memory type
7232 UCHAR ucFlag;
7240 //ucFlag
    [all...]
radeon_atombios.c 3562 if (formula->ucFlag & 1)
3671 if (formula->ucFlag & 1)
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
pptable_v1_0.h 334 UCHAR ucFlag; /* 2 bits indicates memory p-states */
vega10_pptable.h 325 UCHAR ucFlag; /* 2 bits indicates memory p-states */
amdgpu_process_pptables_v1_0.c 1262 *flag = vce_state_record->ucFlag;
  /src/sys/external/bsd/drm2/dist/drm/amd/include/
atombios.h 2056 ULONG ulDISPClkFreq; // target DISPCLK frquency in unit of 10kHz, return real DISPCLK frequency. when ucFlag[1]=1, in unit of 100Hz.
2057 UCHAR ucFlag; // bit0=1: DPREFCLK bypass DFS bit0=0: DPREFCLK not bypass DFS
2058 UCHAR ucCrtc; // use when enable DCCG pixel clock ucFlag[1]=1
2059 UCHAR ucPpllId; // use when enable DCCG pixel clock ucFlag[1]=1
2060 UCHAR ucDeepColorRatio; // use when enable DCCG pixel clock ucFlag[1]=1
2070 //SET_DCE_CLOCK_PARAMETERS_V1_1.ucFlag
5020 UCHAR ucFlag; // bit0=0 :step is 1mv =1 0.5mv
7661 UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineon member in struct:_ATOM_MEMORY_TIMING_FORMAT::__anon9793bf56220a::__anon9793bf562308
7688 UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineon member in struct:_ATOM_MEMORY_TIMING_FORMAT_V1
7724 UCHAR ucflag; // flag to control memory timing calculation. bit0= control EMRS2 Infineo member in struct:_ATOM_MEMORY_TIMING_FORMAT_V2
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