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    Searched refs:ulClock (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_ppatomctrl.c 192 engine_clock_parameters.sReserved.ulClock =
262 mpll_parameters.ulClock = cpu_to_le32(clock_value);
310 mpll_parameters.ulClock.ulClock = cpu_to_le32(clock_value);
318 (uint32_t)mpll_parameters.ulClock.ucPostDiv;
331 mpll_parameters.ulClock.ulClock = cpu_to_le32(clock_value);
345 mpll_param->ulClock =
346 le32_to_cpu(mpll_parameters.ulClock.ulClock);
    [all...]
ppatomfwctrl.h 63 uint32_t ulClock; /* the actual clock */
ppatomctrl.h 152 uint32_t ulClock;
amdgpu_ppatomfwctrl.c 271 dividers->ulClock = le32_to_cpu(pll_output->gpuclock_10khz);
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_atombios.c 1064 args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */
1069 dividers->real_clock = le32_to_cpu(args.v4.ulClock);
1074 args.v6_in.ulClock.ulComputeClockFlag = clock_type;
1075 args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */
1084 dividers->real_clock = le32_to_cpu(args.v6_out.ulClock.ulClock);
1085 dividers->post_divider = args.v6_out.ulClock.ucPostDiv;
1113 args.ulClock = cpu_to_le32(clock); /* 10 khz */
1158 args.sReserved.ulClock = cpu_to_le32(mem_clock & SET_CLOCK_FREQ_MASK);
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_atombios.c 2852 args.v1.ulClock = cpu_to_le32(clock); /* 10 khz */
2866 args.v2.ulClock = cpu_to_le32(clock); /* 10 khz */
2874 dividers->enable_post_div = (le32_to_cpu(args.v2.ulClock) & (1 << 24)) ?
2876 dividers->vco_mode = (le32_to_cpu(args.v2.ulClock) & (1 << 25)) ? 1 : 0;
2920 args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */
2925 dividers->real_clock = le32_to_cpu(args.v4.ulClock);
2930 args.v6_in.ulClock.ulComputeClockFlag = clock_type;
2931 args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */
2940 dividers->real_clock = le32_to_cpu(args.v6_out.ulClock.ulClock);
    [all...]
atombios.h 412 ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Div and ref_div
421 ULONG ulClock; //When return, [23:0] return real clock
464 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter
486 ULONG ulClock:24; //Input= target clock, output = actual clock
488 ULONG ulClock:24; //Input= target clock, output = actual clock
497 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter
514 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter
525 COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divider
545 ULONG ulClock;
570 ATOM_COMPUTE_CLOCK_FREQ ulClock;
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/include/
atombios.h 442 ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Div and ref_div
451 ULONG ulClock; //When return, [23:0] return real clock
498 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter
520 ULONG ulClock:24; //Input= target clock, output = actual clock
522 ULONG ulClock:24; //Input= target clock, output = actual clock
531 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter
548 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter
560 COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divider
573 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter
584 COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divide
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_vegam_smumgr.c 975 mem_level->MclkFrequency = (uint32_t)mpll_param.ulClock;

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