HomeSort by: relevance | last modified time | path
    Searched refs:underlay_idx (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
amdgpu_dc_debug.c 319 unsigned int underlay_idx = dc->res_pool->underlay_pipe_index; local
328 if (pipe_ctx->stream == NULL || pipe_ctx->pipe_idx == underlay_idx)
338 if (pipe_ctx->stream == NULL || pipe_ctx->pipe_idx == underlay_idx)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
amdgpu_dce110_resource.c 907 static bool is_surface_pixel_format_supported(struct pipe_ctx *pipe_ctx, unsigned int underlay_idx)
909 if (pipe_ctx->pipe_idx != underlay_idx)
1107 unsigned int underlay_idx = pool->underlay_pipe_index; local
1108 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[underlay_idx];
1110 if (res_ctx->pipe_ctx[underlay_idx].stream)
1113 pipe_ctx->stream_res.tg = pool->timing_generators[underlay_idx];
1114 pipe_ctx->plane_res.mi = pool->mis[underlay_idx];
1115 /*pipe_ctx->plane_res.ipp = res_ctx->pool->ipps[underlay_idx];*/
1116 pipe_ctx->plane_res.xfm = pool->transforms[underlay_idx];
1117 pipe_ctx->stream_res.opp = pool->opps[underlay_idx];
    [all...]
amdgpu_dce110_hw_sequencer.c 208 unsigned int underlay_idx = dc->res_pool->underlay_pipe_index; local
220 if (controller_id == underlay_idx)
1640 unsigned int underlay_idx = dc->res_pool->underlay_pipe_index; local
1658 if (i == underlay_idx) {
1676 int underlay_idx = pool->underlay_pipe_index; local
1695 if (i == underlay_idx)
1789 unsigned int underlay_idx = dc->res_pool->underlay_pipe_index; local
1811 if (pipe_ctx->pipe_idx != underlay_idx) {

Completed in 39 milliseconds