1 /* $NetBSD: if_url.c,v 1.98 2024/06/30 16:35:19 riastradh Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 5 * Shingo WATANABE <nabe (at) nabechan.org>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of the author nor the names of any co-contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 */ 32 33 /* 34 * The RTL8150L(Realtek USB to fast ethernet controller) spec can be found at 35 * ftp://ftp.realtek.com.tw/lancard/data_sheet/8150/8150v14.pdf 36 * ftp://152.104.125.40/lancard/data_sheet/8150/8150v14.pdf 37 */ 38 39 /* 40 * TODO: 41 * Interrupt Endpoint support 42 * External PHYs 43 * powerhook() support? 44 */ 45 46 #include <sys/cdefs.h> 47 __KERNEL_RCSID(0, "$NetBSD: if_url.c,v 1.98 2024/06/30 16:35:19 riastradh Exp $"); 48 49 #ifdef _KERNEL_OPT 50 #include "opt_inet.h" 51 #include "opt_usb.h" 52 #endif 53 54 #include <sys/param.h> 55 56 #include <net/if_ether.h> 57 #ifdef INET 58 #include <netinet/in.h> 59 #include <netinet/if_inarp.h> 60 #endif 61 62 #include <dev/mii/urlphyreg.h> 63 64 #include <dev/usb/usbnet.h> 65 66 #include <dev/usb/if_urlreg.h> 67 68 /* Function declarations */ 69 static int url_match(device_t, cfdata_t, void *); 70 static void url_attach(device_t, device_t, void *); 71 72 CFATTACH_DECL_NEW(url, sizeof(struct usbnet), url_match, url_attach, 73 usbnet_detach, usbnet_activate); 74 75 static unsigned url_uno_tx_prepare(struct usbnet *, struct mbuf *, 76 struct usbnet_chain *); 77 static void url_uno_rx_loop(struct usbnet *, struct usbnet_chain *, uint32_t); 78 static int url_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *); 79 static int url_uno_mii_write_reg(struct usbnet *, int, int, uint16_t); 80 static void url_uno_stop(struct ifnet *, int); 81 static void url_uno_mii_statchg(struct ifnet *); 82 static int url_uno_init(struct ifnet *); 83 static void url_uno_mcast(struct ifnet *); 84 static void url_reset(struct usbnet *); 85 86 static int url_csr_read_1(struct usbnet *, int); 87 static int url_csr_read_2(struct usbnet *, int); 88 static int url_csr_write_1(struct usbnet *, int, int); 89 static int url_csr_write_2(struct usbnet *, int, int); 90 static int url_csr_write_4(struct usbnet *, int, int); 91 static int url_mem(struct usbnet *, int, int, void *, int); 92 93 static const struct usbnet_ops url_ops = { 94 .uno_stop = url_uno_stop, 95 .uno_mcast = url_uno_mcast, 96 .uno_read_reg = url_uno_mii_read_reg, 97 .uno_write_reg = url_uno_mii_write_reg, 98 .uno_statchg = url_uno_mii_statchg, 99 .uno_tx_prepare = url_uno_tx_prepare, 100 .uno_rx_loop = url_uno_rx_loop, 101 .uno_init = url_uno_init, 102 }; 103 104 /* Macros */ 105 #ifdef URL_DEBUG 106 #define DPRINTF(x) if (urldebug) printf x 107 #define DPRINTFN(n, x) if (urldebug >= (n)) printf x 108 int urldebug = 0; 109 #else 110 #define DPRINTF(x) 111 #define DPRINTFN(n, x) 112 #endif 113 114 #define URL_SETBIT(un, reg, x) \ 115 url_csr_write_1(un, reg, url_csr_read_1(un, reg) | (x)) 116 117 #define URL_SETBIT2(un, reg, x) \ 118 url_csr_write_2(un, reg, url_csr_read_2(un, reg) | (x)) 119 120 #define URL_CLRBIT(un, reg, x) \ 121 url_csr_write_1(un, reg, url_csr_read_1(un, reg) & ~(x)) 122 123 #define URL_CLRBIT2(un, reg, x) \ 124 url_csr_write_2(un, reg, url_csr_read_2(un, reg) & ~(x)) 125 126 static const struct url_type { 127 struct usb_devno url_dev; 128 uint16_t url_flags; 129 #define URL_EXT_PHY 0x0001 130 } url_devs [] = { 131 /* MELCO LUA-KTX */ 132 {{ USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAKTX }, 0}, 133 /* Realtek RTL8150L Generic (GREEN HOUSE USBKR100) */ 134 {{ USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_RTL8150L}, 0}, 135 /* Longshine LCS-8138TX */ 136 {{ USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_LCS8138TX}, 0}, 137 /* Micronet SP128AR */ 138 {{ USB_VENDOR_MICRONET, USB_PRODUCT_MICRONET_SP128AR}, 0}, 139 /* OQO model 01 */ 140 {{ USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01}, 0}, 141 }; 142 #define url_lookup(v, p) ((const struct url_type *)usb_lookup(url_devs, v, p)) 143 144 145 /* Probe */ 146 static int 147 url_match(device_t parent, cfdata_t match, void *aux) 148 { 149 struct usb_attach_arg *uaa = aux; 150 151 return url_lookup(uaa->uaa_vendor, uaa->uaa_product) != NULL ? 152 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 153 } 154 /* Attach */ 155 static void 156 url_attach(device_t parent, device_t self, void *aux) 157 { 158 USBNET_MII_DECL_DEFAULT(unm); 159 struct usbnet * const un = device_private(self); 160 struct usb_attach_arg *uaa = aux; 161 struct usbd_device *dev = uaa->uaa_device; 162 struct usbd_interface *iface; 163 usbd_status err; 164 usb_interface_descriptor_t *id; 165 usb_endpoint_descriptor_t *ed; 166 char *devinfop; 167 int i; 168 169 aprint_naive("\n"); 170 aprint_normal("\n"); 171 devinfop = usbd_devinfo_alloc(dev, 0); 172 aprint_normal_dev(self, "%s\n", devinfop); 173 usbd_devinfo_free(devinfop); 174 175 un->un_dev = self; 176 un->un_udev = dev; 177 un->un_sc = un; 178 un->un_ops = &url_ops; 179 un->un_rx_xfer_flags = USBD_SHORT_XFER_OK; 180 un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER; 181 un->un_rx_list_cnt = URL_RX_LIST_CNT; 182 un->un_tx_list_cnt = URL_TX_LIST_CNT; 183 un->un_rx_bufsz = URL_BUFSZ; 184 un->un_tx_bufsz = URL_BUFSZ; 185 186 /* Move the device into the configured state. */ 187 err = usbd_set_config_no(dev, URL_CONFIG_NO, 1); 188 if (err) { 189 aprint_error_dev(self, "failed to set configuration" 190 ", err=%s\n", usbd_errstr(err)); 191 return; 192 } 193 194 /* get control interface */ 195 err = usbd_device2interface_handle(dev, URL_IFACE_INDEX, &iface); 196 if (err) { 197 aprint_error_dev(self, "failed to get interface, err=%s\n", 198 usbd_errstr(err)); 199 return; 200 } 201 202 un->un_iface = iface; 203 un->un_flags = url_lookup(uaa->uaa_vendor, uaa->uaa_product)->url_flags; 204 #if 0 205 if (un->un_flags & URL_EXT_PHY) { 206 un->un_read_reg_cb = url_ext_mii_read_reg; 207 un->un_write_reg_cb = url_ext_mii_write_reg; 208 } 209 #endif 210 211 /* get interface descriptor */ 212 id = usbd_get_interface_descriptor(un->un_iface); 213 214 /* find endpoints */ 215 un->un_ed[USBNET_ENDPT_RX] = un->un_ed[USBNET_ENDPT_TX] = 216 un->un_ed[USBNET_ENDPT_INTR] = 0; 217 for (i = 0; i < id->bNumEndpoints; i++) { 218 ed = usbd_interface2endpoint_descriptor(un->un_iface, i); 219 if (ed == NULL) { 220 aprint_error_dev(self, 221 "couldn't get endpoint %d\n", i); 222 return; 223 } 224 if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK && 225 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 226 un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress; 227 else if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK && 228 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT) 229 un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress; 230 else if ((ed->bmAttributes & UE_XFERTYPE) == UE_INTERRUPT && 231 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 232 un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress; 233 } 234 235 if (un->un_ed[USBNET_ENDPT_RX] == 0 || 236 un->un_ed[USBNET_ENDPT_TX] == 0 || 237 un->un_ed[USBNET_ENDPT_INTR] == 0) { 238 aprint_error_dev(self, "missing endpoint\n"); 239 return; 240 } 241 242 /* Set these up now for url_mem(). */ 243 usbnet_attach(un); 244 245 /* reset the adapter */ 246 url_reset(un); 247 248 /* Get Ethernet Address */ 249 err = url_mem(un, URL_CMD_READMEM, URL_IDR0, (void *)un->un_eaddr, 250 ETHER_ADDR_LEN); 251 if (err) { 252 aprint_error_dev(self, "read MAC address failed\n"); 253 return; 254 } 255 256 /* initialize interface information */ 257 usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST, 258 0, &unm); 259 } 260 261 /* read/write memory */ 262 static int 263 url_mem(struct usbnet *un, int cmd, int offset, void *buf, int len) 264 { 265 usb_device_request_t req; 266 usbd_status err; 267 268 DPRINTFN(0x200, 269 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 270 271 if (usbnet_isdying(un)) { 272 if (cmd == URL_CMD_READMEM) 273 memset(buf, 0, len); 274 return 0; 275 } 276 277 if (cmd == URL_CMD_READMEM) 278 req.bmRequestType = UT_READ_VENDOR_DEVICE; 279 else 280 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 281 req.bRequest = URL_REQ_MEM; 282 USETW(req.wValue, offset); 283 USETW(req.wIndex, 0x0000); 284 USETW(req.wLength, len); 285 286 err = usbd_do_request(un->un_udev, &req, buf); 287 if (err) { 288 DPRINTF(("%s: url_mem(): %s failed. off=%04x, err=%d\n", 289 device_xname(un->un_dev), 290 cmd == URL_CMD_READMEM ? "read" : "write", 291 offset, err)); 292 if (cmd == URL_CMD_READMEM) 293 memset(buf, 0, len); 294 } 295 296 return err; 297 } 298 299 /* read 1byte from register */ 300 static int 301 url_csr_read_1(struct usbnet *un, int reg) 302 { 303 uint8_t val = 0; 304 305 DPRINTFN(0x100, 306 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 307 308 return url_mem(un, URL_CMD_READMEM, reg, &val, 1) ? 0 : val; 309 } 310 311 /* read 2bytes from register */ 312 static int 313 url_csr_read_2(struct usbnet *un, int reg) 314 { 315 uWord val; 316 317 DPRINTFN(0x100, 318 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 319 320 USETW(val, 0); 321 return url_mem(un, URL_CMD_READMEM, reg, &val, 2) ? 0 : UGETW(val); 322 } 323 324 /* write 1byte to register */ 325 static int 326 url_csr_write_1(struct usbnet *un, int reg, int aval) 327 { 328 uint8_t val = aval; 329 330 DPRINTFN(0x100, 331 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 332 333 return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 1) ? -1 : 0; 334 } 335 336 /* write 2bytes to register */ 337 static int 338 url_csr_write_2(struct usbnet *un, int reg, int aval) 339 { 340 uWord val; 341 342 DPRINTFN(0x100, 343 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 344 345 USETW(val, aval); 346 347 return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 2) ? -1 : 0; 348 } 349 350 /* write 4bytes to register */ 351 static int 352 url_csr_write_4(struct usbnet *un, int reg, int aval) 353 { 354 uDWord val; 355 356 DPRINTFN(0x100, 357 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 358 359 USETDW(val, aval); 360 361 return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 4) ? -1 : 0; 362 } 363 364 static int 365 url_uno_init(struct ifnet *ifp) 366 { 367 struct usbnet * const un = ifp->if_softc; 368 const u_char *eaddr; 369 int i; 370 371 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 372 373 url_reset(un); 374 375 eaddr = CLLADDR(ifp->if_sadl); 376 for (i = 0; i < ETHER_ADDR_LEN; i++) 377 url_csr_write_1(un, URL_IDR0 + i, eaddr[i]); 378 379 /* Init transmission control register */ 380 URL_CLRBIT(un, URL_TCR, 381 URL_TCR_TXRR1 | URL_TCR_TXRR0 | 382 URL_TCR_IFG1 | URL_TCR_IFG0 | 383 URL_TCR_NOCRC); 384 385 /* Init receive control register */ 386 URL_SETBIT2(un, URL_RCR, URL_RCR_TAIL | URL_RCR_AD | URL_RCR_AB); 387 388 /* Enable RX and TX */ 389 URL_SETBIT(un, URL_CR, URL_CR_TE | URL_CR_RE); 390 391 return 0; 392 } 393 394 static void 395 url_reset(struct usbnet *un) 396 { 397 int i; 398 399 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 400 401 if (usbnet_isdying(un)) 402 return; 403 404 URL_SETBIT(un, URL_CR, URL_CR_SOFT_RST); 405 406 for (i = 0; i < URL_TX_TIMEOUT; i++) { 407 if (usbnet_isdying(un)) 408 return; 409 if (!(url_csr_read_1(un, URL_CR) & URL_CR_SOFT_RST)) 410 break; 411 delay(10); /* XXX */ 412 } 413 414 delay(10000); /* XXX */ 415 } 416 417 static void 418 url_uno_mcast(struct ifnet *ifp) 419 { 420 struct usbnet * const un = ifp->if_softc; 421 struct ethercom *ec = usbnet_ec(un); 422 struct ether_multi *enm; 423 struct ether_multistep step; 424 uint32_t mchash[2] = { 0, 0 }; 425 uint32_t h = 0, rcr; 426 427 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 428 429 if (usbnet_isdying(un)) 430 return; 431 432 rcr = url_csr_read_2(un, URL_RCR); 433 rcr &= ~(URL_RCR_AAP | URL_RCR_AAM | URL_RCR_AM); 434 435 ETHER_LOCK(ec); 436 if (usbnet_ispromisc(un)) { 437 ec->ec_flags |= ETHER_F_ALLMULTI; 438 ETHER_UNLOCK(ec); 439 /* run promisc. mode */ 440 rcr |= URL_RCR_AAM; /* ??? */ 441 rcr |= URL_RCR_AAP; 442 goto update; 443 } 444 ec->ec_flags &= ~ETHER_F_ALLMULTI; 445 ETHER_FIRST_MULTI(step, ec, enm); 446 while (enm != NULL) { 447 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 448 ec->ec_flags |= ETHER_F_ALLMULTI; 449 ETHER_UNLOCK(ec); 450 /* accept all multicast frames */ 451 rcr |= URL_RCR_AAM; 452 goto update; 453 } 454 h = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN); 455 /* 1(31) and 5(30:26) bit sampling */ 456 mchash[h >> 31] |= 1 << ((h >> 26) & 0x1f); 457 ETHER_NEXT_MULTI(step, enm); 458 } 459 ETHER_UNLOCK(ec); 460 if (h != 0) 461 rcr |= URL_RCR_AM; /* activate mcast hash filter */ 462 url_csr_write_4(un, URL_MAR0, mchash[0]); 463 url_csr_write_4(un, URL_MAR4, mchash[1]); 464 update: 465 url_csr_write_2(un, URL_RCR, rcr); 466 } 467 468 static unsigned 469 url_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c) 470 { 471 int total_len; 472 473 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev),__func__)); 474 475 KASSERT(un->un_tx_bufsz >= URL_MIN_FRAME_LEN); 476 if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz) 477 return 0; 478 479 /* Copy the mbuf data into a contiguous buffer */ 480 m_copydata(m, 0, m->m_pkthdr.len, c->unc_buf); 481 total_len = m->m_pkthdr.len; 482 483 if (total_len < URL_MIN_FRAME_LEN) { 484 memset(c->unc_buf + total_len, 0, 485 URL_MIN_FRAME_LEN - total_len); 486 total_len = URL_MIN_FRAME_LEN; 487 } 488 489 DPRINTF(("%s: %s: send %d bytes\n", device_xname(un->un_dev), 490 __func__, total_len)); 491 492 return total_len; 493 } 494 495 static void 496 url_uno_rx_loop(struct usbnet *un, struct usbnet_chain *c, uint32_t total_len) 497 { 498 struct ifnet *ifp = usbnet_ifp(un); 499 url_rxhdr_t rxhdr; 500 501 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev),__func__)); 502 503 if (total_len <= ETHER_CRC_LEN || total_len <= sizeof(rxhdr)) { 504 if_statinc(ifp, if_ierrors); 505 return; 506 } 507 508 memcpy(&rxhdr, c->unc_buf + total_len - ETHER_CRC_LEN, sizeof(rxhdr)); 509 510 DPRINTF(("%s: RX Status: %dbytes%s%s%s%s packets\n", 511 device_xname(un->un_dev), 512 UGETW(rxhdr) & URL_RXHDR_BYTEC_MASK, 513 UGETW(rxhdr) & URL_RXHDR_VALID_MASK ? ", Valid" : "", 514 UGETW(rxhdr) & URL_RXHDR_RUNTPKT_MASK ? ", Runt" : "", 515 UGETW(rxhdr) & URL_RXHDR_PHYPKT_MASK ? ", Physical match" : "", 516 UGETW(rxhdr) & URL_RXHDR_MCASTPKT_MASK ? ", Multicast" : "")); 517 518 if ((UGETW(rxhdr) & URL_RXHDR_VALID_MASK) == 0) { 519 if_statinc(ifp, if_ierrors); 520 return; 521 } 522 523 total_len -= ETHER_CRC_LEN; 524 525 DPRINTF(("%s: %s: deliver %d\n", device_xname(un->un_dev), 526 __func__, total_len)); 527 usbnet_enqueue(un, c->unc_buf, total_len, 0, 0, 0); 528 } 529 530 #if 0 531 static void url_intr(void) 532 { 533 } 534 #endif 535 536 /* Stop the adapter and free any mbufs allocated to the RX and TX lists. */ 537 static void 538 url_uno_stop(struct ifnet *ifp, int disable) 539 { 540 struct usbnet * const un = ifp->if_softc; 541 542 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 543 544 url_reset(un); 545 } 546 547 static int 548 url_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val) 549 { 550 uint16_t data; 551 usbd_status err = USBD_NORMAL_COMPLETION; 552 553 DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x\n", 554 device_xname(un->un_dev), __func__, phy, reg)); 555 556 /* XXX: one PHY only for the RTL8150 internal PHY */ 557 if (phy != 0) { 558 DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n", 559 device_xname(un->un_dev), __func__, phy)); 560 *val = 0; 561 return EINVAL; 562 } 563 564 switch (reg) { 565 case MII_BMCR: /* Control Register */ 566 reg = URL_BMCR; 567 break; 568 case MII_BMSR: /* Status Register */ 569 reg = URL_BMSR; 570 break; 571 case MII_PHYIDR1: 572 case MII_PHYIDR2: 573 *val = 0; 574 goto R_DONE; 575 break; 576 case MII_ANAR: /* Autonegotiation advertisement */ 577 reg = URL_ANAR; 578 break; 579 case MII_ANLPAR: /* Autonegotiation link partner abilities */ 580 reg = URL_ANLP; 581 break; 582 case URLPHY_MSR: /* Media Status Register */ 583 reg = URL_MSR; 584 break; 585 default: 586 printf("%s: %s: bad register %04x\n", 587 device_xname(un->un_dev), __func__, reg); 588 return EINVAL; 589 } 590 591 if (reg == URL_MSR) 592 data = url_csr_read_1(un, reg); 593 else 594 data = url_csr_read_2(un, reg); 595 *val = data; 596 597 R_DONE: 598 DPRINTFN(0xff, ("%s: %s: phy=%d reg=0x%04x => 0x%04hx\n", 599 device_xname(un->un_dev), __func__, phy, reg, *val)); 600 601 return err; 602 } 603 604 static int 605 url_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val) 606 { 607 608 DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x val=0x%04hx\n", 609 device_xname(un->un_dev), __func__, phy, reg, val)); 610 611 /* XXX: one PHY only for the RTL8150 internal PHY */ 612 if (phy != 0) { 613 DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n", 614 device_xname(un->un_dev), __func__, phy)); 615 return EINVAL; 616 } 617 618 switch (reg) { 619 case MII_BMCR: /* Control Register */ 620 reg = URL_BMCR; 621 break; 622 case MII_BMSR: /* Status Register */ 623 reg = URL_BMSR; 624 break; 625 case MII_PHYIDR1: 626 case MII_PHYIDR2: 627 return 0; 628 case MII_ANAR: /* Autonegotiation advertisement */ 629 reg = URL_ANAR; 630 break; 631 case MII_ANLPAR: /* Autonegotiation link partner abilities */ 632 reg = URL_ANLP; 633 break; 634 case URLPHY_MSR: /* Media Status Register */ 635 reg = URL_MSR; 636 break; 637 default: 638 printf("%s: %s: bad register %04x\n", 639 device_xname(un->un_dev), __func__, reg); 640 return EINVAL; 641 } 642 643 if (reg == URL_MSR) 644 url_csr_write_1(un, reg, val); 645 else 646 url_csr_write_2(un, reg, val); 647 648 return 0; 649 } 650 651 static void 652 url_uno_mii_statchg(struct ifnet *ifp) 653 { 654 struct usbnet * const un = ifp->if_softc; 655 656 DPRINTF(("%s: %s: enter\n", ifp->if_xname, __func__)); 657 658 /* XXX */ 659 usbnet_set_link(un, true); 660 } 661 662 #if 0 663 /* 664 * external PHYs support, but not test. 665 */ 666 static usbd_status 667 url_ext_mii_read_reg(struct usbnet *un, int phy, int reg) 668 { 669 uint16_t val; 670 671 DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x\n", 672 device_xname(un->un_dev), __func__, phy, reg)); 673 674 url_csr_write_1(un, URL_PHYADD, phy & URL_PHYADD_MASK); 675 /* 676 * RTL8150L will initiate a MII management data transaction 677 * if PHYCNT_OWN bit is set 1 by software. After transaction, 678 * this bit is auto cleared by TRL8150L. 679 */ 680 url_csr_write_1(un, URL_PHYCNT, 681 (reg | URL_PHYCNT_PHYOWN) & ~URL_PHYCNT_RWCR); 682 for (i = 0; i < URL_TIMEOUT; i++) { 683 if ((url_csr_read_1(un, URL_PHYCNT) & URL_PHYCNT_PHYOWN) == 0) 684 break; 685 } 686 if (i == URL_TIMEOUT) { 687 printf("%s: MII read timed out\n", device_xname(un->un_dev)); 688 } 689 690 val = url_csr_read_2(un, URL_PHYDAT); 691 692 DPRINTF(("%s: %s: phy=%d reg=0x%04x => 0x%04x\n", 693 device_xname(un->un_dev), __func__, phy, reg, val)); 694 695 return USBD_NORMAL_COMPLETION; 696 } 697 698 static usbd_status 699 url_ext_mii_write_reg(struct usbnet *un, int phy, int reg, int data) 700 { 701 702 DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x data=0x%04x\n", 703 device_xname(un->un_dev), __func__, phy, reg, data)); 704 705 url_csr_write_2(un, URL_PHYDAT, data); 706 url_csr_write_1(un, URL_PHYADD, phy); 707 url_csr_write_1(un, URL_PHYCNT, reg | URL_PHYCNT_RWCR); /* Write */ 708 709 for (i=0; i < URL_TIMEOUT; i++) { 710 if (url_csr_read_1(un, URL_PHYCNT) & URL_PHYCNT_PHYOWN) 711 break; 712 } 713 714 if (i == URL_TIMEOUT) { 715 printf("%s: MII write timed out\n", 716 device_xname(un->un_dev)); 717 return USBD_TIMEOUT; 718 } 719 720 return USBD_NORMAL_COMPLETION; 721 } 722 #endif 723 724 #ifdef _MODULE 725 #include "ioconf.c" 726 #endif 727 728 USBNET_MODULE(url) 729
Indexes created Tue Sep 30 11:09:46 GMT 2025