| /src/sys/external/isc/libsodium/dist/src/libsodium/crypto_shorthash/siphash24/ref/ |
| shorthash_siphash_ref.h | 12 v2 += v3; \
13 v3 = ROTL64(v3, 16); \
14 v3 ^= v2; \
15 v0 += v3; \
16 v3 = ROTL64(v3, 21); \
17 v3 ^= v0; \
|
| shorthash_siphashx24_ref.c | 12 uint64_t v3 = 0x7465646279746573ULL; local in function:crypto_shorthash_siphashx24
21 v3 ^= k1;
27 v3 ^= m;
51 v3 ^= b;
60 b = v0 ^ v1 ^ v2 ^ v3;
67 b = v0 ^ v1 ^ v2 ^ v3;
|
| shorthash_siphash24_ref.c | 13 uint64_t v3 = 0x7465646279746573ULL; local in function:crypto_shorthash_siphash24
22 v3 ^= k1;
28 v3 ^= m;
52 v3 ^= b;
61 b = v0 ^ v1 ^ v2 ^ v3;
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/amazon/ |
| Makefile | 3 dtb-$(CONFIG_ARCH_ALPINE) += alpine-v3-evp.dtb
|
| /src/sys/nfs/ |
| nfsproto.h | 106 #define NFSERR_RETERR 0x80000000 /* Mark an error return for V3 */
134 #define NFSX_FH(v3) ((v3) ? (NFSX_V3FHMAX + NFSX_UNSIGNED) : \
136 #define NFSX_SRVFH(nsfh, v3) (((v3) ? NFSX_UNSIGNED : 0) + NFSRVFH_SIZE(nsfh))
137 #define NFSX_FATTR(v3) ((v3) ? NFSX_V3FATTR : NFSX_V2FATTR)
138 #define NFSX_PREOPATTR(v3) ((v3) ? (7 * NFSX_UNSIGNED) : 0)
139 #define NFSX_POSTOPATTR(v3) ((v3) ? (NFSX_V3FATTR + NFSX_UNSIGNED) : 0
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
| dcn_calc_math.h | 39 float dcn_bw_max3(float v1, float v2, float v3);
40 float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5);
|
| reg_helper.h | 74 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \
78 FN(reg, f3), v3)
80 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \
84 FN(reg, f3), v3,\
87 #define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \
92 FN(reg, f3), v3,\
96 #define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \
101 FN(reg, f3), v3,\
106 #define REG_SET_7(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \
111 FN(reg, f3), v3,\
[all...] |
| /src/sys/fs/nfs/common/ |
| oldnfsproto.h | 144 #define NFSERR_RETERR 0x80000000 /* Mark an error return for V3 */
177 #define NFSX_FH(v3) ((v3) ? (NFSX_V3FHMAX + NFSX_UNSIGNED) : \
179 #define NFSX_SRVFH(v3) ((v3) ? NFSX_V3FH : NFSX_V2FH)
180 #define NFSX_FATTR(v3) ((v3) ? NFSX_V3FATTR : NFSX_V2FATTR)
181 #define NFSX_PREOPATTR(v3) ((v3) ? (7 * NFSX_UNSIGNED) : 0)
182 #define NFSX_POSTOPATTR(v3) ((v3) ? (NFSX_V3FATTR + NFSX_UNSIGNED) : 0
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/ |
| qoriq-fman3-0.dtsi | 3 * QorIQ FMan v3 device tree
33 compatible = "fsl,fman-v3-port-oh";
39 compatible = "fsl,fman-v3-port-oh";
45 compatible = "fsl,fman-v3-port-oh";
51 compatible = "fsl,fman-v3-port-oh";
57 compatible = "fsl,fman-v3-port-oh";
63 compatible = "fsl,fman-v3-port-oh";
|
| qoriq-fman3-0-10g-0.dtsi | 3 * QorIQ FMan v3 10g port #0 device tree
12 compatible = "fsl,fman-v3-port-rx";
19 compatible = "fsl,fman-v3-port-tx";
|
| qoriq-fman3-0-10g-1.dtsi | 3 * QorIQ FMan v3 10g port #1 device tree
12 compatible = "fsl,fman-v3-port-rx";
19 compatible = "fsl,fman-v3-port-tx";
|
| qoriq-fman3-0-1g-0.dtsi | 3 * QorIQ FMan v3 1g port #0 device tree
12 compatible = "fsl,fman-v3-port-rx";
18 compatible = "fsl,fman-v3-port-tx";
|
| qoriq-fman3-0-1g-1.dtsi | 3 * QorIQ FMan v3 1g port #1 device tree
12 compatible = "fsl,fman-v3-port-rx";
18 compatible = "fsl,fman-v3-port-tx";
|
| qoriq-fman3-0-1g-2.dtsi | 3 * QorIQ FMan v3 1g port #2 device tree
12 compatible = "fsl,fman-v3-port-rx";
18 compatible = "fsl,fman-v3-port-tx";
|
| qoriq-fman3-0-1g-3.dtsi | 3 * QorIQ FMan v3 1g port #3 device tree
12 compatible = "fsl,fman-v3-port-rx";
18 compatible = "fsl,fman-v3-port-tx";
|
| qoriq-fman3-0-1g-4.dtsi | 3 * QorIQ FMan v3 1g port #4 device tree
12 compatible = "fsl,fman-v3-port-rx";
18 compatible = "fsl,fman-v3-port-tx";
|
| qoriq-fman3-0-1g-5.dtsi | 3 * QorIQ FMan v3 1g port #5 device tree
12 compatible = "fsl,fman-v3-port-rx";
18 compatible = "fsl,fman-v3-port-tx";
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/ |
| amdgpu_dcn_calc_math.c | 101 float dcn_bw_max3(float v1, float v2, float v3)
103 return v3 > dcn_bw_max2(v1, v2) ? v3 : dcn_bw_max2(v1, v2);
106 float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5)
108 return dcn_bw_max3(v1, v2, v3) > dcn_bw_max2(v4, v5) ? dcn_bw_max3(v1, v2, v3) : dcn_bw_max2(v4, v5);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/src/ |
| dmub_reg.h | 72 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \
76 FN(reg, f3), v3)
78 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \
82 FN(reg, f3), v3, \
99 #define REG_UPDATE_3(reg, f1, v1, f2, v2, f3, v3) \
103 FN(reg, f3), v3)
105 #define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \
109 FN(reg, f3), v3, \
|
| /src/sys/external/bsd/drm2/include/linux/ |
| uuid.h | 39 #define GUID_INIT(x, y, z, v0, v1, v2, v3, v4, v5, v6, v7) ((guid_t) \
53 [11] = (v3), \
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| sun8i-v3.dtsi | 13 compatible = "allwinner,sun8i-v3-i2s",
30 compatible = "allwinner,sun8i-v3-ccu";
34 compatible = "allwinner,sun8i-v3-codec-analog",
52 compatible = "allwinner,sun8i-v3-pinctrl";
|
| /src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/allwinner/ |
| sun20i-common-regulators.dtsi | 12 reg_vcc_3v3: vcc-3v3 {
14 regulator-name = "vcc-3v3";
|
| Makefile | 2 dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-clockworkpi-v3.14.dtb
3 dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-devterm-v3.14.dtb
|
| /src/sys/external/isc/libsodium/dist/src/libsodium/crypto_pwhash/argon2/ |
| blamka-round-ref.h | 27 #define BLAKE2_ROUND_NOMSG(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11, \
33 G(v3, v7, v11, v15); \
37 G(v3, v4, v9, v14); \
|
| /src/sys/crypto/aes/arch/arm/ |
| aes_armv8_64.S | 136 mov v3.16b, v1.16b
137 aese v3.16b, v0.16b
139 /* v3.4s[i] := RotWords(SubBytes(prk[3])) ^ RCON */
141 tbl v3.16b, {v3.16b}, v16.16b
142 eor v3.16b, v3.16b, v4.16b
154 eor v1.16b, v1.16b, v3.16b
197 mov v3.16b, v2.16b
198 aese v3.16b, v0.16
[all...] |
