HomeSort by: relevance | last modified time | path
    Searched refs:vready_after_vcount0 (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/
amdgpu_display_rq_dlg_helpers.c 315 "DML_RQ_DLG_CALC: vready_after_vcount0 = 0x%0x\n",
316 dlg_regs.vready_after_vcount0);
display_mode_structs.h 456 unsigned int vready_after_vcount0; member in struct:_vcs_dpi_display_dlg_regs_st
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/
amdgpu_display_rq_dlg_calc_20.c 1033 disp_dlg_regs->vready_after_vcount0 = 1;
1035 disp_dlg_regs->vready_after_vcount0 = 0;
1040 disp_dlg_regs->vready_after_vcount0 = 1;
1042 disp_dlg_regs->vready_after_vcount0 = 0;
amdgpu_display_rq_dlg_calc_20v2.c 1034 disp_dlg_regs->vready_after_vcount0 = 1;
1036 disp_dlg_regs->vready_after_vcount0 = 0;
1041 disp_dlg_regs->vready_after_vcount0 = 1;
1043 disp_dlg_regs->vready_after_vcount0 = 0;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/
amdgpu_display_rq_dlg_calc_21.c 1073 disp_dlg_regs->vready_after_vcount0 = 1;
1075 disp_dlg_regs->vready_after_vcount0 = 0;
1080 disp_dlg_regs->vready_after_vcount0 = 1;
1082 disp_dlg_regs->vready_after_vcount0 = 0;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_hw_sequencer_debug.c 280 dlg_regs->chunk_hdl_adjust_cur1, dlg_regs->vready_after_vcount0, dlg_regs->dst_y_delta_drq_limit,
amdgpu_dcn10_hw_sequencer.c 247 dlg_regs->chunk_hdl_adjust_cur1, dlg_regs->vready_after_vcount0, dlg_regs->dst_y_delta_drq_limit,

Completed in 20 milliseconds