| /src/sys/dev/ic/ |
| pca9564var.h | 33 void (*write_byte)(device_t, int reg, uint8_t val); member in struct:pca9564_ios
|
| pca9564.c | 60 #define CSR_WRITE(sc, r, v) (*sc->sc_ios.write_byte)(sc->sc_dev, r, v)
|
| /src/external/gpl3/gdb/dist/sim/mips/ |
| dv-tx3904tmr.c | 376 unsigned_1 write_byte = ((const char*) source)[byte]; local
387 controller->tcr = (unsigned_4) (write_byte & 0xef);
400 SET_ITMR_TIIE(controller, write_byte & 0x80);
404 SET_ITMR_TZCE(controller, write_byte & 0x01);
412 controller->ccdr = write_byte & 0x07;
420 SET_PMGR_TPIBE(controller, write_byte & 0x80);
421 SET_PMGR_TPIAE(controller, write_byte & 0x40);
425 SET_PMGR_FFI(controller, write_byte & 0x01);
433 SET_WTMR_TWIE(controller, write_byte & 0x80);
437 SET_WTMR_WDIS(controller, write_byte & 0x80)
[all...] |
| dv-tx3904sio.c | 379 unsigned_1 write_byte = ((const unsigned char*) source)[byte]; local
383 /* HW_TRACE ((me, "byte %d %02x", reg_offset, write_byte)); */
389 SLCR_SET_BYTE(controller, reg_offset, write_byte);
402 SDICR_SET_BYTE(controller, reg_offset, write_byte);
425 SDISR_CLEAR_FLAG_BYTE(controller, reg_offset, write_byte);
438 SFCR_SET_BYTE(controller, reg_offset, write_byte);
447 SBGR_SET_BYTE(controller, reg_offset, write_byte);
454 tx3904sio_fifo_push(me, & controller->tx_fifo, write_byte);
|
| /src/external/gpl3/gdb.old/dist/sim/mips/ |
| dv-tx3904tmr.c | 376 unsigned_1 write_byte = ((const char*) source)[byte]; local
387 controller->tcr = (unsigned_4) (write_byte & 0xef);
400 SET_ITMR_TIIE(controller, write_byte & 0x80);
404 SET_ITMR_TZCE(controller, write_byte & 0x01);
412 controller->ccdr = write_byte & 0x07;
420 SET_PMGR_TPIBE(controller, write_byte & 0x80);
421 SET_PMGR_TPIAE(controller, write_byte & 0x40);
425 SET_PMGR_FFI(controller, write_byte & 0x01);
433 SET_WTMR_TWIE(controller, write_byte & 0x80);
437 SET_WTMR_WDIS(controller, write_byte & 0x80)
[all...] |
| dv-tx3904sio.c | 379 unsigned_1 write_byte = ((const unsigned char*) source)[byte]; local
383 /* HW_TRACE ((me, "byte %d %02x", reg_offset, write_byte)); */
389 SLCR_SET_BYTE(controller, reg_offset, write_byte);
402 SDICR_SET_BYTE(controller, reg_offset, write_byte);
425 SDISR_CLEAR_FLAG_BYTE(controller, reg_offset, write_byte);
438 SFCR_SET_BYTE(controller, reg_offset, write_byte);
447 SBGR_SET_BYTE(controller, reg_offset, write_byte);
454 tx3904sio_fifo_push(me, & controller->tx_fifo, write_byte);
|
| /src/external/gpl3/gdb/dist/sim/ppc/ |
| hw_eeprom.c | 532 write_byte(device *me, function
713 write_byte(me, eeprom, address, byte);
|
| /src/external/gpl3/gdb.old/dist/sim/ppc/ |
| hw_eeprom.c | 532 write_byte(device *me, function
713 write_byte(me, eeprom, address, byte);
|
