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Searched
refs:x198
(Results
1 - 25
of
58
) sorted by relevancy
1
2
3
/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
dm816.h
34
#define DM816_SPINBOX_CLKCTRL DM816_CLKCTRL_INDEX(0
x198
)
dra7.h
162
#define DRA7_MCASP4_CLKCTRL _DRA7_L4PER_CLKCTRL_INDEX(0
x198
)
357
#define DRA7_L4PER2_MCASP4_CLKCTRL DRA7_L4PER2_CLKCTRL_INDEX(0
x198
)
/src/sys/arch/arm/sunxi/
sunxi_can.h
140
#define SUNXI_CAN_RBUF_RBACK6 0
x198
/src/sys/dev/pcmcia/
if_cnwreg.h
106
#define CNW_EREG_STAT_OBEAT 0
x198
/src/sys/arch/arm/ti/
omap2_gpmcreg.h
114
#define GPMC_CONFIG7_6 0
x198
137
#define GPMC_CONFIG7_6 0
x198
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
ox810se-wd-mbwe.dts
40
linux,code = <0
x198
>;
omap4-kc1.dts
92
OMAP4_IOPAD(0
x198
, PIN_INPUT | MUX_MODE0) /* usba0_otg_dm */
motorola-mapphone-common.dtsi
482
OMAP4_IOPAD(0
x198
, MUX_MODE7)
502
OMAP4_IOPAD(0
x198
, PIN_INPUT | MUX_MODE0)
544
OMAP4_IOPAD(0
x198
, MUX_MODE7)
vf610-pinfunc.h
655
#define VF610_PAD_PTC29__GPIO_102 0
x198
0x000 ALT0 0x0
656
#define VF610_PAD_PTC29__SAI1_TX_DATA 0
x198
0x000 ALT1 0x0
657
#define VF610_PAD_PTC29__DSPI0_CS2 0
x198
0x000 ALT2 0x0
658
#define VF610_PAD_PTC29__SRC_RCON27 0
x198
0x000 ALT3 0x0
659
#define VF610_PAD_PTC29__FB_BE1_B 0
x198
0x000 ALT4 0x0
660
#define VF610_PAD_PTC29__FB_MUXED_TSIZE1 0
x198
0x000 ALT5 0x0
661
#define VF610_PAD_PTC29__DCU1_B4 0
x198
0x000 ALT7 0x0
/src/sys/arch/hpcmips/tx/
tx39ioreg.h
44
#define TX39_IOMFIOPOWERDWN_REG 0
x198
/src/sys/arch/sh3/include/
pcicreg.h
83
#define SH4_PCIDTC1 (SH4_PCIC+0
x198
) /* 32bit */
/src/tests/lib/libcurses/tests/
std_defines
135
assign KEY_UNDO 0
x198
/src/sys/arch/amiga/amiga/
cc_registers.h
230
#define R_COLOR0C 0
x198
/src/sys/arch/atari/stand/xxboot/ahdi-sdb00t/
sdb00t.ahdi.S
144
movw #0
x198
,%a6@
/src/sys/arch/atari/stand/xxboot/sdboot/
sdboot.S
158
movw #0
x198
,%a6@
/src/sys/dev/pci/
cs4281reg.h
148
#define CS4281_FPDR2 0
x198
/* FIFO Polled Data Register 2 */
/src/sys/dev/sbus/
p9100reg.h
148
#define VID_DACSYNC 0
x198
/* read after last DAC access */
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/stingray/
stingray-pinctrl.dtsi
255
0
x198
MODE_NITRO /* sdio0_data5 */
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_8_0_d.h
174
#define mmMP_SMUIF12_MP0PUB_IND_INDEX 0
x198
219
#define mmMP0PUB_IND_INDEX_12 0
x198
/src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/mscc/
ocelot.dtsi
85
reg = <0x100400 0x100>, <0
x198
0x8>;
/src/lib/libcurses/
keyname.c
471
if (key == 0
x198
) {
/src/sys/arch/arm/imx/
imx23_digctlreg.h
315
#define HW_DIGCTL_OCRAM_STATUS8_CLR 0
x198
/src/sys/arch/arm/nvidia/
tegra210_pinmux.c
163
TEGRA_PIN("hdmi_cec_pcc0", 0
x198
, "cec", "rsvd1", "rsvd2", "rsvd3"),
tegra_hdmireg.h
263
#define HDMI_NV_PDISP_SOR_SEQ_INST6_REG 0
x198
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/
imx8mm-pinfunc.h
393
#define MX8MM_IOMUXC_SAI1_TXD3_SAI1_TX_DATA3 0
x198
0x400 0x000 0x0 0x0
394
#define MX8MM_IOMUXC_SAI1_TXD3_SAI5_TX_DATA3 0
x198
0x400 0x000 0x1 0x0
395
#define MX8MM_IOMUXC_SAI1_TXD3_CORESIGHT_TRACE11 0
x198
0x400 0x000 0x4 0x0
396
#define MX8MM_IOMUXC_SAI1_TXD3_GPIO4_IO15 0
x198
0x400 0x000 0x5 0x0
397
#define MX8MM_IOMUXC_SAI1_TXD3_CCMSRCGPCMIX_BOOT_CFG11 0
x198
0x400 0x000 0x6 0x0
398
#define MX8MM_IOMUXC_SAI1_TXD3_SIM_M_HADDR30 0
x198
0x400 0x000 0x7 0x0
Completed in 35 milliseconds
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Indexes created Wed Oct 22 13:09:56 GMT 2025