| /src/sys/arch/hpcmips/tx/ |
| tx39reg.h | 46 #define TX3922_REVISION_REG 0x208
|
| /src/games/bcd/ |
| bcd.c | 98 0x404, 0x402, 0x401, 0x280, 0x240, 0x220, 0x210, 0x208,
102 0x402, 0x401, 0x280, 0x240, 0x220, 0x210, 0x208, 0x204,
114 0x402, 0x401, 0x280, 0x240, 0x220, 0x210, 0x208, 0x204,
118 0x402, 0x401, 0x280, 0x240, 0x220, 0x210, 0x208, 0x204,
|
| /src/sys/arch/arm/samsung/ |
| mct_reg.h | 44 #define MCT_G_COMP0_ADD_INCR 0x208 /* compare0 auto add value */
|
| /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/ |
| lpc18xx-ccu.h | 22 #define CLK_APB1_MOTOCON_PWM 0x208
|
| dra7.h | 173 #define DRA7_MCASP7_CLKCTRL _DRA7_L4PER_CLKCTRL_INDEX(0x208)
363 #define DRA7_L4PER2_MCASP7_CLKCTRL DRA7_L4PER2_CLKCTRL_INDEX(0x208)
|
| /src/sys/external/gpl2/dts/dist/include/dt-bindings/reset/ |
| hisi,hi6220-resets.h | 29 #define PERIPH_RSTEN2_HPM3 0x208
|
| /src/sys/arch/arm/cortex/ |
| pl310_reg.h | 96 #define L2C_EV_CTR0_CTL 0x208
|
| /src/sys/arch/arm/marvell/ |
| orionreg.h | 170 #define ORION_MLMB_MFIQIMR 0x208 /* Main FIQ Interrupt Mask */
|
| kirkwoodreg.h | 171 #define KIRKWOOD_MLMB_MFIQIMLR 0x208 /*Main FIQ Interrupt Low Mask*/
|
| mv78xx0reg.h | 170 #define MV78XX0_ICI_MICHR 0x208 /* Main Interrupt Cause High */
|
| mvsocreg.h | 154 #define MVSOC_MLMB_CFU_EVA 0x208
|
| dovereg.h | 148 #define DOVE_DB_MFIQIMR 0x208 /* Main FIQ Interrupt Mask */
|
| /src/sys/arch/evbmips/malta/ |
| maltareg.h | 138 #define MALTA_STATUS (MALTA_FPGA_BASE + 0x208)
|
| /src/lib/libmenu/ |
| menu.h | 44 #define REQ_SCR_UPAGE (KEY_MAX + 0x208)
|
| /src/sys/arch/mips/adm5120/include/ |
| adm5120reg.h | 278 #define ADM5120_MPMC_SWO(__i) (0x208 + 0x020 * (__i))
|
| /src/sys/dev/isa/ |
| ioat66.c | 68 #define IOAT66SHARED 0x208
|
| addcom_isa.c | 104 0x208
|
| /src/sys/dev/pci/ |
| if_nfereg.h | 78 #define NFE_PATTERN_MASK 0x208
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| wm8650.dtsi | 103 reg = <0x208>;
|
| /src/sys/arch/arm/ti/ |
| omap2_gpmcreg.h | 160 #define GPMC_ECC3_RESULT 0x208
|
| /src/sys/arch/sparc64/dev/ |
| ffbreg.h | 153 #define FFB_FBC_FG 0x208
|
| /src/sys/dev/bi/ |
| if_nireg.h | 69 #define NI_PSR 0x208
|
| /src/sys/dev/ic/ |
| bcmgenetreg.h | 50 #define GENET_INTRL2_CPU_CLEAR 0x208
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/stingray/ |
| stingray-pinctrl.dtsi | 298 0x208 MODE_NITRO /* spi1_txd */
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/cavium/ |
| thunder-88xx.dtsi | 308 reg = <0x0 0x208>;
|
