| /src/common/lib/libc/arch/aarch64/string/ |
| memcmp.S | 59 ldr x6, [x10], #8 /* load dword from src2 */ 65 lsr x6, x6, x3 /* discard leading bytes from data2 */ 66 lsl x6, x6, x3 /* get back bit position */ 69 lsl x6, x6, x3 /* discard leading bytes from data2 */ 70 lsr x6, x6, x3 /* get back bit position */ 72 subs x0, x4, x6 /* compare data * [all...] |
| strlen.S | 93 sub x6, x7, x11 /* a = X - 1 */ 95 bic x6, x6, x7 /* a & ~b */ 96 cbz x6, .Lstrlen_dword_loop /* no NULs so get next dword */ 101 rev x6, x6 /* convert to BE */ 102 clz x6, x6 /* find null byte */ 103 add x0, x0, x6, lsr #3 /* add offset to the length */
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| /src/sys/arch/pmax/pmax/ |
| pmaxtype.h | 46 #define DS_MIPSFAIR 0x6 /* DECsystem 5400 */
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| /src/sys/dev/ic/ |
| depcareg.h | 74 #define DEPCA_RAP 0x6
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| pca9564reg.h | 47 #define I2CCON_CR_44KHZ (0x6)
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| /src/sys/dev/isa/ |
| tsdioreg.h | 37 #define TSDIO_PBDR 0x6
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| /src/sys/external/gpl2/dts/dist/include/dt-bindings/sound/ |
| adi,adau1977.h | 13 #define ADAU1977_MICBIAS_8V0 0x6
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| /src/sys/external/gpl2/dts/dist/include/dt-bindings/soc/ |
| qcom,apr.h | 13 #define APR_DOMAIN_MAX 0x6 19 #define APR_SVC_VPM 0x6
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| /src/lib/libc/arch/aarch64/sys/ |
| __syscall.S | 65 mov x5, x6 66 mov x6, x7
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| /src/sys/dev/i2c/ |
| mpl115areg.h | 43 #define MPL115A_B1_MSB 0x6
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| /src/sys/external/gpl2/dts/dist/include/dt-bindings/pmu/ |
| exynos_ppmu.h | 20 #define PPMU_WO_DATA_CNT 0x6
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| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/microchip/ |
| sparx5.dtsi | 87 reg = <0x6 0x1110000c 0x24>; 114 reg = <0x6 0x00300000 0x10000>, /* GIC Dist */ 115 <0x6 0x00340000 0xc0000>, /* GICR */ 116 <0x6 0x00200000 0x2000>, /* GICC */ 117 <0x6 0x00210000 0x2000>, /* GICV */ 118 <0x6 0x00220000 0x2000>; /* GICH */ 125 reg = <0x6 0x00000000 0xd0>; 140 reg = <0x6 0x11010008 0x4>; 150 reg = <0x6 0x00100000 0x20>; 163 reg = <0x6 0x00102000 0x20> [all...] |
| /src/sys/external/isc/libsodium/dist/src/libsodium/crypto_core/hsalsa20/ref2/ |
| core_hsalsa20_ref2.c | 22 uint32_t x0, x1, x2, x3, x4, x5, x6, x7, x8, local in function:crypto_core_hsalsa20 45 x6 = LOAD32_LE(in + 0); 59 x14 ^= ROTL32(x10 + x6, 7); 61 x6 ^= ROTL32(x2 + x14, 13); 62 x10 ^= ROTL32(x6 + x2, 18); 71 x6 ^= ROTL32(x5 + x4, 7); 72 x7 ^= ROTL32(x6 + x5, 9); 73 x4 ^= ROTL32(x7 + x6, 13); 89 STORE32_LE(out + 16, x6);
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| /src/sys/external/gpl2/dts/dist/include/dt-bindings/net/ |
| ti-dp83867.h | 28 #define DP83867_RGMIIDCTL_1_75_NS 0x6 46 #define DP83867_CLK_O_SEL_CHN_C_RCLK_DIV5 0x6
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| /src/tests/net/bpf/ |
| t_div-by-zero.c | 33 { 0x6, 0, 0, 0x00000060 }, 34 { 0x6, 0, 0, 0x00000000 },
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| /src/sys/arch/amiga/clockport/ |
| flipperreg.h | 51 #define FLIPPER_DSP_DH 0x6
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| /src/sys/arch/arm/amlogic/ |
| mesong12a_pinctrl.c | 370 GPIO_MUX_PINCTRL_GROUP("sdcard_d0_z", 0x6, 2, GPIOZ_2, 5), 371 GPIO_MUX_PINCTRL_GROUP("sdcard_d1_z", 0x6, 3, GPIOZ_3, 5), 372 GPIO_MUX_PINCTRL_GROUP("sdcard_d2_z", 0x6, 4, GPIOZ_4, 5), 373 GPIO_MUX_PINCTRL_GROUP("sdcard_d3_z", 0x6, 5, GPIOZ_5, 5), 374 GPIO_MUX_PINCTRL_GROUP("sdcard_clk_z", 0x6, 6, GPIOZ_6, 5), 375 GPIO_MUX_PINCTRL_GROUP("sdcard_cmd_z", 0x6, 7, GPIOZ_7, 5), 376 GPIO_MUX_PINCTRL_GROUP("i2c0_sda_z0", 0x6, 0, GPIOZ_0, 4), 377 GPIO_MUX_PINCTRL_GROUP("i2c0_sck_z1", 0x6, 1, GPIOZ_1, 4), 378 GPIO_MUX_PINCTRL_GROUP("i2c0_sda_z7", 0x6, 7, GPIOZ_7, 7), 382 GPIO_MUX_PINCTRL_GROUP("iso7816_clk_z", 0x6, 0, GPIOZ_0, 3) [all...] |
| /src/sys/arch/evbmips/alchemy/ |
| dbau1500reg.h | 46 #define DBAU1500_WHOAMI_DBAU1500 0x6
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| /src/sys/arch/hpcmips/vr/ |
| bcureg.h | 182 #define BCUROMSPEED_ATIME_9VT (0x6) /* 9VTClock */ 209 #define BCUIO0SPEED_RDYRW_9VT (0x6) /* 9VTClock */ 227 #define BCUIO0SPEED_RWRDY_5VT (0x6) /* 5VTClock */ 245 #define BCUIO0SPEED_CSRW_7VT (0x6) /* 7VTClock */ 272 #define BCUIO1SPEED_RDYRW_9VT (0x6) /* 9VTClock */ 290 #define BCUIO1SPEED_RWRDY_5VT (0x6) /* 5VTClock */ 308 #define BCUIO1SPEED_CSRW_7VT (0x6) /* 7VTClock */ 328 #define BCUSPD_WLCDRFU1 (0x6<<8) /* LCD RFU */ 337 #define BCUSPD_ISAM2T (0x6<<8) /* ISAM 2TClock */ 355 #define BCUSPD_WROMA3T (0x6<<0) /* 3TClock * [all...] |
| /src/sys/arch/powerpc/ibm4xx/dev/ |
| rgmiireg.h | 41 #define FER_CHCFG_TBI 0x6 /* TBI enabled */
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/xilinx/ |
| zynqmp-zcu102-rev1.0.dts | 26 reg = <0x20 0x6>; 30 reg = <0xd0 0x6>;
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| /src/sys/external/gpl2/dts/dist/include/dt-bindings/phy/ |
| phy-qcom-qusb2.h | 18 #define QUSB2_V2_HSTX_TRIM_20_4_MA 0x6
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| /src/sys/arch/atari/dev/ |
| viewioctl.h | 58 #define VIOCGCMAP _IOWR('V', 0x6, colormap_t)
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| /src/sys/arch/amiga/dev/ |
| viewioctl.h | 58 #define VIOCGCMAP _IOWR('V', 0x6, colormap_t)
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| /src/sys/arch/aarch64/aarch64/ |
| cpuswitch.S | 80 ldr x6, [x0, #L_PCB] /* x6 = lwp_getpcb(oldlwp) */ 81 str x4, [x6, #PCB_TF] 84 ldr x6, [x1, #L_PCB] /* x6 = lwp_getpcb(newlwp) */ 85 ldr x4, [x6, #PCB_TF] /* get trapframe ptr (aka SP) */ 87 str xzr, [x6, #PCB_TF] /* clear l->l_addr->pcb_tf */ 101 ldp x5, x6, [x1, #L_MD_IA_KERN] 103 msr APIAKeyHi_EL1, x6 110 ldp x5, x6, [x1, #L_MD_IB_USER [all...] |