/src/sys/dev/pci/ |
pciide_sch_reg.h | 35 #define SCH_D1TIM 0x84
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pciide_svwsata_reg.h | 38 #define SVWSATA_SICR2 0x84
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pciide_sii3112_reg.h | 64 #define SII3112_DTM_IDE1 0x84 /* Data Transfer Mode - IDE1 */
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trmreg.h | 84 #define TRM_SCSI_INTSTATUS 0x84 /* SCSI Interrupt Status (R) */ 93 #define TRM_SCSI_OFFSET 0x84 /* SCSI Offset Count (W) */
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/src/sys/arch/evbarm/iq31244/ |
iq31244_machdep.c | 72 strtc_wdog_config(device_private(dv), 0x84);
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/src/sys/arch/macppc/dev/ |
platinumfbreg.h | 59 #define PLATINUM_DAC_0 0x84
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/src/include/ |
stab.h | 58 #define N_SOL 0x84 /* included source file name */
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/src/sys/dev/i2c/ |
si70xxreg.h | 38 #define SI70XX_READ_FW_VERA 0x84
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au8522mod_8vsb.h | 30 { 0x8090, 0x84 },
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max6900reg.h | 57 #define MAX6900_REG_HOUR 0x84
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/src/sys/dev/dec/ |
lk201reg.h | 45 #define LK_LED_3 0x84 49 #define LK_LED_LOCK 0x84
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/src/sys/dev/microcode/wi/ |
spectrum24t_cf.h | 77 0x04,0x61,0x60,0x46,0xdc,0x84,0x00,0xfa,0xcd,0x81,0x01,0xfc,0xfa,0x02,0x00,0x64, 117 0x66,0x50,0x65,0x52,0x61,0x51,0x0a,0x00,0x40,0x67,0x26,0x45,0xb4,0x84,0x40,0x46, 124 0xb4,0x84,0x40,0x46,0x15,0xf5,0x06,0xf0,0x80,0x60,0x64,0x50,0x20,0x52,0x7e,0x71, 128 0x0e,0x00,0x61,0x44,0xc5,0x81,0x63,0x45,0xc5,0x81,0x60,0x45,0x00,0x64,0xd4,0x84, 132 0x25,0x46,0x01,0xf0,0x03,0x67,0xa0,0x85,0x94,0x80,0x2f,0x58,0xff,0xff,0x84,0xe2, 158 0x62,0x43,0xbf,0xd1,0xf8,0xa3,0xa3,0xd1,0x64,0x43,0x60,0x41,0x15,0xf5,0xe8,0x84, 159 0xdc,0x84,0x22,0xfa,0x5a,0xd8,0x62,0x44,0xbd,0xd1,0xc9,0x81,0x58,0xd8,0xfc,0x02, 161 0x62,0x43,0xcc,0x84,0xe0,0x85,0x0b,0x06,0xbf,0xd1,0x64,0x41,0xd5,0x80,0x64,0x43, 164 0x60,0x41,0xd8,0x84,0xe8,0x84,0x22,0xfa,0x25,0x44,0x23,0xfa,0xbf,0xd3,0x66,0x45 [all...] |
/src/sys/dev/hdaudio/ |
hdmireg.h | 37 #define HDMI_AI_PACKET_TYPE 0x84
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/src/sys/dev/ic/ |
smc90cx6reg.h | 52 #define BAH_RXBC(x) (0x84 | ((x)<<3))
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advmcode.c | 76 0x00, 0xA3, 0xD6, 0x00, 0xA6, 0x97, 0x7F, 0x23, 0x04, 0x61, 0x84, 0x01, 0xE6, 0x84, 0xD2, 0xC1, 79 0x84, 0x97, 0x07, 0xA6, 0x0C, 0x01, 0x00, 0x33, 0x03, 0x00, 0xC0, 0x88, 0x03, 0x03, 0x03, 0xDE, 88 0x50, 0x00, 0x00, 0xA3, 0x44, 0x01, 0x00, 0x05, 0x84, 0x81, 0x46, 0x97, 0x02, 0x01, 0x05, 0xC6, 91 0x00, 0x33, 0x1B, 0x00, 0xC0, 0x88, 0x06, 0x23, 0x68, 0x98, 0xCD, 0x04, 0xE6, 0x84, 0x06, 0x01, 92 0x00, 0xA2, 0xDC, 0x01, 0x57, 0x60, 0x00, 0xA0, 0xE2, 0x01, 0xE6, 0x84, 0x80, 0x23, 0xA0, 0x01, 93 0xE6, 0x84, 0x80, 0x73, 0x4B, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x08, 0x02, 0x04, 0x01, 0x0C, 0xDE, 94 0x02, 0x01, 0x03, 0xCC, 0x4F, 0x00, 0x84, 0x97, 0x04, 0x82, 0x08, 0x23, 0x02, 0x41, 0x82, 0x01, 95 0x4F, 0x00, 0x62, 0x97, 0x48, 0x04, 0x84, 0x80, 0xF0, 0x97, 0x00, 0x46, 0x56, 0x00, 0x03, 0xC0, 102 0xA0, 0x01, 0x14, 0x23, 0xA1, 0x01, 0x3C, 0x84, 0x04, 0x01, 0x0C, 0xDC, 0xE0, 0x23, 0x25, 0x61 [all...] |
/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/fb/ |
nouveau_nvkm_subdev_fb_ramnv1a.c | 58 pci_read_config_dword(bridge, 0x84, &mem);
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/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/qcom/ |
sm8150-microsoft-surface-duo.dts | 390 0x17 0x19 0x03 0x84 0x5e 0x04 0x08 0x84 0x5d 0x01 391 0x84 0x5e 0x02 0x00 0xa4 0x5d 0x03 0x84 0x5e 0x06 392 0x08 0x84 0x5d 0x05 0x84 0x5d 0x06 0x84 0x5e 0x08 393 0x84 0x5e 0x05 0x8c 0x5e 0x24 0x84 0x5f 0x10 0x84 [all...] |
/src/sys/dev/isa/ |
wdsreg.h | 112 #define WDSX_SND_DATA 0x84 153 #define WDS_MBI_EHRESET 0x84
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/src/sys/arch/arm/nvidia/ |
tegra_timerreg.h | 52 #define TMR9_PCR_REG 0x84
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/src/sys/arch/arm/sa11x0/ |
sa11x0_dmacreg.h | 72 #define SADMAC_DCR4_SET 0x84
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/src/sys/arch/sparc/include/ |
trap.h | 103 #define T_CLEANWIN 0x84 /* request new windows to be cleaned */
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/src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/bios/ |
gpio.h | 15 DCB_GPIO_LOGO_LED_PWM = 0x84,
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/src/sys/external/isc/atheros_hal/dist/ar5416/ |
ar5416_phy.c | 54 /* 39 Mb */ { AH_TRUE, HT, 39000, 0x84, 0x00, 4, 8, 0, 0 }, 87 /* 39 Mb */ { AH_TRUE, HT, 39000, 0x84, 0x00, 4, 8, 0, 0 },
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/src/sys/arch/evbarm/dev/ |
v360reg.h | 78 #define V360_DMA_LOCAL_ADDR0 0x84
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/src/sys/arch/hp300/dev/ |
nhpibreg.h | 108 #define AUX_SHDFE 0x84 /* Set holdoff on EOI data only */
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