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    Searched refs:xc (Results 1 - 25 of 506) sorted by relevancy

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  /src/sys/dev/i2c/
xc3028.c 81 xc3028_name(struct xc3028 *xc)
83 if (xc->type == XC3028L)
90 xc3028_firmware_name(struct xc3028 *xc)
92 if (xc->type == XC3028L)
99 xc3028_reset(struct xc3028 *xc)
103 if (xc->reset)
104 error = xc->reset(xc->reset_priv);
110 xc3028_get_basefw(struct xc3028 *xc)
115 for (i = 0; i < xc->nfw; i++)
489 struct xc3028 *xc; local in function:xc3028_open
    [all...]
xc5k.c 66 xc5k_reset(struct xc5k *xc)
70 if (xc->reset)
71 error = xc->reset(xc->reset_priv);
77 xc5k_firmware_upload(struct xc5k *xc, const uint8_t *fw, size_t fwlen)
94 error = xc5k_reset(xc);
116 error = xc5k_write_buffer(xc, cmd, wrlen + 2);
129 xc5k_firmware_open(struct xc5k *xc)
139 error = xc5k_read_2(xc, XC5K_REG_PRODUCT_ID, &product_id);
159 aprint_normal_dev(xc->parent, "xc5k: loading firmware '%s/%s'\n"
256 struct xc5k *xc; local in function:xc5k_open
    [all...]
  /src/sys/kern/
subr_xcall.c 357 xc_state_t *xc; local in function:xc_wait
369 xc = &xc_high_pri;
372 xc = &xc_low_pri;
377 if (atomic_load_acquire(&xc->xc_donep) >= where) {
383 mutex_enter(&xc->xc_lock);
384 while (xc->xc_donep < where) {
385 cv_wait(&xc->xc_busy, &xc->xc_lock);
387 mutex_exit(&xc->xc_lock);
398 xc_state_t *xc = &xc_low_pri local in function:xc_lowpri
442 xc_state_t *xc = &xc_low_pri; local in function:xc_thread
489 xc_state_t *xc = & xc_high_pri; local in function:xc_ipi_handler
506 xc_state_t *xc = &xc_high_pri; local in function:xc__highpri_intr
549 xc_state_t *xc = &xc_high_pri; local in function:xc_highpri
    [all...]
  /src/share/examples/puffs/pgfs/
pgfs_puffs.c 86 struct Xconn *xc; local in function:pgfs_node_getattr
94 xc = begin_readonly(pu, "getattr");
95 error = getattr(xc, fileid, va, GETATTR_ALL);
99 error = commit(xc);
105 rollback(xc);
129 struct Xconn *xc = NULL; local in function:pgfs_node_readdir
158 if (xc == NULL) {
159 xc = begin(pu, "readdir1");
161 error = lookupp(xc, parent_fileid, &child_fileid);
163 rollback(xc);
296 struct Xconn *xc; local in function:pgfs_node_lookup
383 struct Xconn *xc; local in function:pgfs_node_mkdir
425 struct Xconn *xc; local in function:pgfs_node_create
465 struct Xconn *xc; local in function:pgfs_node_write
540 struct Xconn *xc; local in function:pgfs_node_read
592 struct Xconn *xc; local in function:pgfs_node_link
634 struct Xconn *xc; local in function:pgfs_node_remove
672 struct Xconn *xc; local in function:pgfs_node_rmdir
721 struct Xconn *xc; local in function:pgfs_node_inactive
757 struct Xconn *xc; local in function:pgfs_node_setattr
954 struct Xconn *xc; local in function:pgfs_node_rename
1038 struct Xconn *xc; local in function:pgfs_node_symlink
1094 struct Xconn *xc; local in function:pgfs_node_readlink
1124 struct Xconn *xc; local in function:pgfs_node_access
1164 struct Xconn *xc; local in function:pgfs_fs_statvfs
    [all...]
pgfs_db.c 68 dumperror(struct Xconn *xc, const PGresult *res)
112 struct Xconn *xc; local in function:getxc
116 TAILQ_FOREACH(xc, &xclist, list) {
117 if (xc->blocker == NULL) {
118 assert(xc->owner == NULL);
119 xc->owner = cc;
120 DPRINTF("xc %p acquire %p\n", xc, cc);
121 return xc;
123 assert(xc->owner == xc->blocker)
701 struct Xconn *xc = getxc(puffs_cc_getcc(pu)); local in function:begin
718 struct Xconn *xc = getxc(puffs_cc_getcc(pu)); local in function:begin_readonly
790 struct Xconn *xc = vp; local in function:pgfs_notice_receiver
801 struct Xconn *xc; local in function:pgfs_readframe
861 struct Xconn *xc; local in function:pgfs_connectdb
948 struct Xconn *xc; local in function:flush_xacts
    [all...]
pgfs_subs.c 215 my_lo_truncate(struct Xconn *xc, int32_t fd, int32_t size)
222 error = sendcmd(xc, c, fd, size);
226 error = simplefetch(xc, INT4OID, &ret);
243 my_lo_lseek(struct Xconn *xc, int32_t fd, int32_t offset, int32_t whence,
251 error = sendcmd(xc, c, fd, offset, whence);
255 error = simplefetch(xc, INT4OID, &ret);
266 my_lo_read(struct Xconn *xc, int32_t fd, void *buf, size_t size,
274 error = sendcmdx(xc, 1, c, fd, (int32_t)size);
278 error = simplefetch(xc, BYTEA, buf, &resultsize);
290 my_lo_write(struct Xconn *xc, int32_t fd, const void *buf, size_t size
    [all...]
  /src/lib/libc/gdtoa/
sum.c 44 ULong carry, *xc, *xa, *xb, *xe, y; local in function:sum
59 xc = c->x;
60 xe = xc + b->wds;
67 Storeinc(xc, z, y);
69 while(xc < xe);
71 while(xc < xe) {
76 Storeinc(xc, z, y);
82 *xc++ = y & 0xffff;
84 while(xc < xe);
86 while(xc < xe)
    [all...]
  /src/sys/arch/pmax/pmax/
pmaxtype.h 49 #define DS_MIPSMATE 0xc /* DECsystem 5100 */
  /src/sys/dev/ic/
depcareg.h 75 #define DEPCA_ADP 0xc
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/clk/
clk_11_0_0_sh_mask.h 30 #define CLK3_0_CLK3_CLK_PLL_REQ__PllSpineDiv__SHIFT 0xc
  /src/sys/dev/isa/
if_levar.h 32 #define BICC_RDP 0xc
  /src/sys/external/bsd/drm2/dist/drm/vmwgfx/
vmwgfx_reg.h 42 #define VMWGFX_IOSIZE 0xc
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/thm/
thm_9_0_sh_mask.h 57 #define THM_TCON_HTC__PROCHOT_EVENT_SRC__SHIFT 0xc
313 #define THM_TMON0_RDIL0_DATA__TEMP__SHIFT 0xc
320 #define THM_TMON0_RDIL1_DATA__TEMP__SHIFT 0xc
327 #define THM_TMON0_RDIL2_DATA__TEMP__SHIFT 0xc
334 #define THM_TMON0_RDIL3_DATA__TEMP__SHIFT 0xc
341 #define THM_TMON0_RDIL4_DATA__TEMP__SHIFT 0xc
348 #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT 0xc
355 #define THM_TMON0_RDIL6_DATA__TEMP__SHIFT 0xc
362 #define THM_TMON0_RDIL7_DATA__TEMP__SHIFT 0xc
369 #define THM_TMON0_RDIL8_DATA__TEMP__SHIFT 0xc
    [all...]
thm_10_0_sh_mask.h 57 #define THM_TCON_HTC__PROCHOT_EVENT_SRC__SHIFT 0xc
169 #define THM_TMON0_RDIL0_DATA__TEMP__SHIFT 0xc
176 #define THM_TMON0_RDIL1_DATA__TEMP__SHIFT 0xc
183 #define THM_TMON0_RDIL2_DATA__TEMP__SHIFT 0xc
190 #define THM_TMON0_RDIL3_DATA__TEMP__SHIFT 0xc
197 #define THM_TMON0_RDIL4_DATA__TEMP__SHIFT 0xc
204 #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT 0xc
211 #define THM_TMON0_RDIL6_DATA__TEMP__SHIFT 0xc
218 #define THM_TMON0_RDIL7_DATA__TEMP__SHIFT 0xc
225 #define THM_TMON0_RDIL8_DATA__TEMP__SHIFT 0xc
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/df/
df_3_6_sh_mask.h 51 #define DF_CS_UMC_AON0_DramBaseAddress0__DramBaseAddr__SHIFT 0xc
61 #define DF_CS_UMC_AON0_DramLimitAddress0__DramLimitAddr__SHIFT 0xc
df_1_7_sh_mask.h 43 #define DF_CS_AON0_DramBaseAddress0__DramBaseAddr__SHIFT 0xc
  /src/sys/external/gpl2/dts/dist/include/dt-bindings/phy/
phy-qcom-qusb2.h 24 #define QUSB2_V2_HSTX_TRIM_16_8_MA 0xc
  /src/sys/arch/hpcmips/vr/
vrledreg.h 59 #define LEDINT_REG_W 0xc /* LED Interrupt register */
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mmhub/
mmhub_9_4_1_sh_mask.h 33 #define DAGB0_RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
54 #define DAGB0_RDCLI1__MAX_BW_ENABLE__SHIFT 0xc
75 #define DAGB0_RDCLI2__MAX_BW_ENABLE__SHIFT 0xc
96 #define DAGB0_RDCLI3__MAX_BW_ENABLE__SHIFT 0xc
117 #define DAGB0_RDCLI4__MAX_BW_ENABLE__SHIFT 0xc
138 #define DAGB0_RDCLI5__MAX_BW_ENABLE__SHIFT 0xc
159 #define DAGB0_RDCLI6__MAX_BW_ENABLE__SHIFT 0xc
180 #define DAGB0_RDCLI7__MAX_BW_ENABLE__SHIFT 0xc
201 #define DAGB0_RDCLI8__MAX_BW_ENABLE__SHIFT 0xc
222 #define DAGB0_RDCLI9__MAX_BW_ENABLE__SHIFT 0xc
    [all...]
  /src/sys/arch/mac68k/obio/
grf_obioreg.h 103 #define RBV_CMAP_LEN 0xc
  /src/sys/external/gpl2/dts/dist/include/dt-bindings/net/
ti-dp83869.h 34 #define DP83869_CLK_O_SEL_REF_CLK 0xc
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_4_1_sh_mask.h 117 #define GDS_EDC_OA_DED__UNUSED1__SHIFT 0xc
138 #define GDS_EDC_OA_PHY_CNT__UNUSED1__SHIFT 0xc
153 #define GDS_EDC_OA_PIPE_CNT__ME1_PIPE3_PIPE_MEM_SEC__SHIFT 0xc
174 #define SPI_EDC_CNT__SPI_WB_GRANT_61_SEC_COUNT__SHIFT 0xc
197 #define SQC_EDC_CNT2__DATA_BANKA_BANK_RAM_SEC_COUNT__SHIFT 0xc
218 #define SQC_EDC_CNT3__DATA_BANKB_BANK_RAM_SEC_COUNT__SHIFT 0xc
235 #define SQC_EDC_PARITY_CNT3__DATA_BANKA_MISS_FIFO_SEC_COUNT__SHIFT 0xc
268 #define SQC_EDC_CNT__DATA_CU1_UTCL1_LFIFO_SEC_COUNT__SHIFT 0xc
324 #define SQ_EDC_CNT__VGPR0_SEC_COUNT__SHIFT 0xc
355 #define TA_EDC_CNT__TA_FX_LFIFO_SEC_COUNT__SHIFT 0xc
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_5_0_sh_mask.h 64 #define UVD_UDEC_ADDR_CONFIG__NUM_SHADER_ENGINES__SHIFT 0xc
82 #define UVD_UDEC_DB_ADDR_CONFIG__NUM_SHADER_ENGINES__SHIFT 0xc
100 #define UVD_UDEC_DBW_ADDR_CONFIG__NUM_SHADER_ENGINES__SHIFT 0xc
162 #define UVD_CGC_GATE__UDEC_RE__SHIFT 0xc
206 #define UVD_CGC_STATUS__LMI_MC_SCLK__SHIFT 0xc
254 #define UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT 0xc
318 #define UVD_CGC_UDEC_STATUS__MP_SCLK__SHIFT 0xc
374 #define UVD_LMI_ADDR_EXT__VCPU_VM_ADDR_EXT__SHIFT 0xc
392 #define UVD_LMI_CTRL__MASK_MC_URGENT__SHIFT 0xc
440 #define UVD_LMI_STATUS__ADP_MC_READ_CLEAN__SHIFT 0xc
    [all...]
uvd_6_0_sh_mask.h 64 #define UVD_UDEC_ADDR_CONFIG__NUM_SHADER_ENGINES__SHIFT 0xc
82 #define UVD_UDEC_DB_ADDR_CONFIG__NUM_SHADER_ENGINES__SHIFT 0xc
100 #define UVD_UDEC_DBW_ADDR_CONFIG__NUM_SHADER_ENGINES__SHIFT 0xc
164 #define UVD_CGC_GATE__UDEC_RE__SHIFT 0xc
208 #define UVD_CGC_STATUS__LMI_MC_SCLK__SHIFT 0xc
256 #define UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT 0xc
320 #define UVD_CGC_UDEC_STATUS__MP_SCLK__SHIFT 0xc
376 #define UVD_LMI_ADDR_EXT__VCPU_VM_ADDR_EXT__SHIFT 0xc
394 #define UVD_LMI_CTRL__MASK_MC_URGENT__SHIFT 0xc
442 #define UVD_LMI_STATUS__ADP_MC_READ_CLEAN__SHIFT 0xc
    [all...]
  /src/sys/arch/sparc/sparc/
intreg.h 76 #define IENAB_SYS ((_MAXNBPG * _MAXNCPU) + 0xc)
114 #define ICR_SI_SET (SI_INTR_VA + 0xc)

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