Searched refs:BRW_BLENDFACTOR_ONE (Results 1 - 15 of 15) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dbrw_util.c63 return BRW_BLENDFACTOR_ONE;
H A Dbrw_defines.h77 #define BRW_BLENDFACTOR_ONE 0x1 macro
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/
H A Dbrw_util.c63 return BRW_BLENDFACTOR_ONE;
H A Dbrw_defines.h77 #define BRW_BLENDFACTOR_ONE 0x1 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di965_render.c73 {0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ZERO},
75 {0, 0, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_ONE},
77 {0, 1, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_INV_SRC_ALPHA},
79 {1, 0, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_ONE},
95 {0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ONE},
131 *sblend = BRW_BLENDFACTOR_ONE;
H A Di965_video.c741 cc_state->cc5.ia_src_blend_factor = BRW_BLENDFACTOR_ONE;
742 cc_state->cc5.ia_dest_blend_factor = BRW_BLENDFACTOR_ONE;
H A Dbrw_defines.h163 #define BRW_BLENDFACTOR_ONE 0x1 macro
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di965_render.c60 {0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ZERO},
62 {0, 0, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_ONE},
64 {0, 1, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_INV_SRC_ALPHA},
66 {1, 0, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_ONE},
82 {0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ONE},
130 *sblend = BRW_BLENDFACTOR_ONE;
H A Dbrw_defines.h163 #define BRW_BLENDFACTOR_ONE 0x1 macro
H A Di965_video.c858 cc_state.cc5.ia_src_blend_factor = BRW_BLENDFACTOR_ONE;
859 cc_state.cc5.ia_dest_blend_factor = BRW_BLENDFACTOR_ONE;
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di965_render.c60 {0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ZERO},
62 {0, 0, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_ONE},
64 {0, 1, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_INV_SRC_ALPHA},
66 {1, 0, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_ONE},
82 {0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ONE},
130 *sblend = BRW_BLENDFACTOR_ONE;
H A Dbrw_defines.h163 #define BRW_BLENDFACTOR_ONE 0x1 macro
H A Di965_video.c859 cc_state.cc5.ia_src_blend_factor = BRW_BLENDFACTOR_ONE;
860 cc_state.cc5.ia_dest_blend_factor = BRW_BLENDFACTOR_ONE;
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Dbrw_defines.h163 #define BRW_BLENDFACTOR_ONE 0x1 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Dbrw_defines.h163 #define BRW_BLENDFACTOR_ONE 0x1 macro

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