Searched refs:BRW_VERTICAL_STRIDE_16 (Results 1 - 19 of 19) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/sna/brw/
H A Dbrw_wm.c84 dw == 16 ? BRW_VERTICAL_STRIDE_16 : BRW_VERTICAL_STRIDE_8,
161 dw == 16 ? BRW_VERTICAL_STRIDE_16 : BRW_VERTICAL_STRIDE_8,
H A Dbrw_eu.h305 #define BRW_VERTICAL_STRIDE_16 5 macro
1272 BRW_VERTICAL_STRIDE_16,
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/brw/
H A Dbrw_wm.c84 dw == 16 ? BRW_VERTICAL_STRIDE_16 : BRW_VERTICAL_STRIDE_8,
161 dw == 16 ? BRW_VERTICAL_STRIDE_16 : BRW_VERTICAL_STRIDE_8,
H A Dbrw_eu.h305 #define BRW_VERTICAL_STRIDE_16 5 macro
1272 BRW_VERTICAL_STRIDE_16,
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_eu_defines.h971 BRW_VERTICAL_STRIDE_16 = 5, enumerator in enum:brw_vertical_stride
H A Dtest_eu_validate.cpp446 { BRW_VERTICAL_STRIDE_16, false },
482 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
495 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
530 brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
534 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
548 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
562 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
576 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
594 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
H A Dbrw_reg.h459 BRW_VERTICAL_STRIDE_16,
H A Dbrw_eu_emit.c675 case BRW_VERTICAL_STRIDE_16:
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dtest_eu_validate.cpp839 { BRW_VERTICAL_STRIDE_16, false },
875 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
888 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
923 brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
927 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
941 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
955 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
969 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
987 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
H A Dbrw_eu_defines.h1045 BRW_VERTICAL_STRIDE_16 = 5, enumerator in enum:brw_vertical_stride
H A Dbrw_reg.h452 BRW_VERTICAL_STRIDE_16,
H A Dbrw_eu_emit.c779 case BRW_VERTICAL_STRIDE_16:
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Dbrw_defines.h677 #define BRW_VERTICAL_STRIDE_16 5 macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Dbrw_defines.h677 #define BRW_VERTICAL_STRIDE_16 5 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Dbrw_defines.h677 #define BRW_VERTICAL_STRIDE_16 5 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Dbrw_defines.h677 #define BRW_VERTICAL_STRIDE_16 5 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Dbrw_defines.h670 #define BRW_VERTICAL_STRIDE_16 5 macro
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen8_eu.c983 dw == 16 ? BRW_VERTICAL_STRIDE_16 : BRW_VERTICAL_STRIDE_8,
1038 dw == 16 ? BRW_VERTICAL_STRIDE_16 : BRW_VERTICAL_STRIDE_8,
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen8_eu.c983 dw == 16 ? BRW_VERTICAL_STRIDE_16 : BRW_VERTICAL_STRIDE_8,
1038 dw == 16 ? BRW_VERTICAL_STRIDE_16 : BRW_VERTICAL_STRIDE_8,

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