| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_emit_gv100.h | 154 case CC_EQ : data = 0x02; break;
178 case CC_EQ: data = 0x02; break;
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| H A D | nv50_ir.h | 333 CC_EQ = 2, enumerator in enum:nv50_ir::CondCode
334 CC_NOT_P = CC_EQ, // when used with FILE_PREDICATE
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| H A D | nv50_ir_lowering_nvc0.cpp | 1465 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE),
1494 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(),
1580 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE),
2169 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE),
2516 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE),
2628 pred2d = bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE),
2650 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE),
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| H A D | nv50_ir_lowering_nv50.cpp | 921 bld.mkMov(bit, imm)->setPredicate(CC_EQ, pred);
977 bld.mkFlow(OP_BRA, texiBB, CC_EQ, pred)->fixed = 1;
1195 bld.mkMov(src1, v1)->setPredicate(CC_EQ, pred);
1223 bld.mkMov(src1, v1)->setPredicate(CC_EQ, i->getSrc(2));
1507 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_FLAGS),
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| H A D | nv50_ir.cpp | 478 case CC_EQ: return reg.data.f32 == fval;
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| H A D | nv50_ir_emit_gm107.cpp | 377 case CC_EQ : data = 0x02; break;
403 case CC_EQ: data = 0x02; break;
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| H A D | nv50_ir_from_nir.cpp | 710 return CC_EQ;
1453 mkFlow(OP_BRA, elseBB, CC_EQ, src)->setType(sType);
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| H A D | nv50_ir_emit_gk110.cpp | 277 case CC_EQ: n = 0x02; break;
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| H A D | nv50_ir_emit_nv50.cpp | 212 case CC_EQ: enc = 0x2; break;
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| H A D | nv50_ir_emit_nvc0.cpp | 250 case CC_EQ: val = 0x2; break;
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| H A D | nv50_ir_from_tgsi.cpp | 715 return CC_EQ;
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| H A D | nv50_ir_peephole.cpp | 1376 case CC_EQ: cc = inverseCondCode(cc); break; // bool == 0 -- !bool
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_lowering_nv50.cpp | 867 bld.mkMov(bit, imm)->setPredicate(CC_EQ, pred);
923 bld.mkFlow(OP_BRA, texiBB, CC_EQ, pred)->fixed = 1;
1077 bld.mkMov(src1, v1)->setPredicate(CC_EQ, pred);
1105 bld.mkMov(src1, v1)->setPredicate(CC_EQ, i->getSrc(2));
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| H A D | nv50_ir.h | 308 CC_EQ = 2, enumerator in enum:nv50_ir::CondCode
309 CC_NOT_P = CC_EQ, // when used with FILE_PREDICATE
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| H A D | nv50_ir_lowering_nvc0.cpp | 1451 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE),
1480 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(),
1566 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE),
2148 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE),
2392 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE),
2505 bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE),
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| H A D | nv50_ir.cpp | 477 case CC_EQ: return reg.data.f32 == fval;
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| H A D | nv50_ir_emit_gm107.cpp | 373 case CC_EQ : data = 0x02; break;
399 case CC_EQ: data = 0x02; break;
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| H A D | nv50_ir_from_nir.cpp | 661 return CC_EQ;
1681 mkFlow(OP_BRA, elseBB, CC_EQ, src)->setType(sType);
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| H A D | nv50_ir_emit_gk110.cpp | 279 case CC_EQ: n = 0x02; break;
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| H A D | nv50_ir_emit_nv50.cpp | 214 case CC_EQ: enc = 0x2; break;
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| H A D | nv50_ir_emit_nvc0.cpp | 252 case CC_EQ: val = 0x2; break;
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| H A D | nv50_ir_from_tgsi.cpp | 775 return CC_EQ;
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| H A D | nv50_ir_peephole.cpp | 1340 case CC_EQ: cc = inverseCondCode(cc); break; // bool == 0 -- !bool
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