Searched refs:DP_TRAINING_LANE0_SET (Results 1 - 1 of 1) sorted by relevance

/xsrc/external/mit/xf86-video-ati/dist/src/
H A Datombios_output.c113 #define DP_TRAINING_LANE0_SET 0x103 macro
2632 atom_dp_aux_native_write(output, DP_TRAINING_LANE0_SET, radeon_output->dp_lane_count, train_set);

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