Searched refs:GEN5_SURFACEFORMAT_B10G10R10A2_UNORM (Results 1 - 4 of 4) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen5_render.h620 #define GEN5_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 macro
H A Dgen5_render.c327 return GEN5_SURFACEFORMAT_B10G10R10A2_UNORM;
358 return GEN5_SURFACEFORMAT_B10G10R10A2_UNORM;
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen5_render.h620 #define GEN5_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 macro
H A Dgen5_render.c290 return GEN5_SURFACEFORMAT_B10G10R10A2_UNORM;
321 return GEN5_SURFACEFORMAT_B10G10R10A2_UNORM;

Completed in 25 milliseconds