Searched refs:GEN5_SURFACEFORMAT_R16G16_SSCALED (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dkgem_debug_gen5.c183 case GEN5_SURFACEFORMAT_R16G16_SSCALED:
H A Dgen5_render.h647 #define GEN5_SURFACEFORMAT_R16G16_SSCALED 0x0F6 macro
H A Dgen5_render.c977 GEN5_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT |
992 format = GEN5_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT;
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dkgem_debug_gen5.c183 case GEN5_SURFACEFORMAT_R16G16_SSCALED:
H A Dgen5_render.h647 #define GEN5_SURFACEFORMAT_R16G16_SSCALED 0x0F6 macro
H A Dgen5_render.c940 GEN5_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT |
955 format = GEN5_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT;

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