Searched refs:GEN7_PIPE_CONTROL (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen7_render.h146 /* for GEN7_PIPE_CONTROL */
147 #define GEN7_PIPE_CONTROL GEN7_3D(3, 2, 0) macro
H A Dgen7_render.c1103 OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2));
1124 OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2));
1133 OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2));
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen7_render.h146 /* for GEN7_PIPE_CONTROL */
147 #define GEN7_PIPE_CONTROL GEN7_3D(3, 2, 0) macro
H A Dgen7_render.c1066 OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2));
1087 OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2));
1096 OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2));
/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
H A DgenX_pipeline.c291 anv_batch_emit(batch, GEN7_PIPE_CONTROL, pc) {
/xsrc/external/mit/MesaLib.old/src/intel/genxml/
H A Dgen7_pack.h6174 struct GEN7_PIPE_CONTROL { struct
6216 __attribute__((unused)) const struct GEN7_PIPE_CONTROL * restrict values)

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