| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_target_gm107.cpp | 246 case OP_ABS:
283 case OP_ABS:
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| H A D | nv50_ir_lowering_nv50.cpp | 80 bld->mkOp1(OP_ABS, mul->sType, s[0], mul->getSrc(0));
81 bld->mkOp1(OP_ABS, mul->sType, s[1], mul->getSrc(1));
507 bld.mkOp1(OP_ABS, ty, a, div->getSrc(0));
508 bld.mkOp1(OP_ABS, ty, b, div->getSrc(1));
734 src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), i->getSrc(c));
975 src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), crd[c]);
1054 bld.mkOp1(OP_ABS, TYPE_S32, i->getDef(0), i->getDef(0));
|
| H A D | nv50_ir_target_nv50.cpp | 91 { OP_ABS, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1, 0x1, 0x0 },
462 case OP_ABS:
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| H A D | nv50_ir_lowering_helper.cpp | 33 case OP_ABS:
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| H A D | nv50_ir_target_nvc0.cpp | 111 { OP_ABS, 0x0, 0x0, 0x0, 0x0, 0x1, 0x0 },
478 case OP_ABS:
652 case OP_ABS:
|
| H A D | nv50_ir_lowering_gm107.cpp | 156 src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), crd[c]);
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| H A D | nv50_ir_peephole.cpp | 539 case NV50_IR_MOD_ABS: return OP_ABS;
850 case OP_ABS: res.data.f32 = fabsf(imm.reg.data.f32); break;
1275 Value *abs = bld.mkOp1v(OP_ABS, TYPE_S32, bld.getSSA(), i->getSrc(0));
1498 case OP_ABS:
1701 (mi->op != OP_ABS &&
1712 if ((i->op == OP_ABS) || i->src(s).mod.abs()) {
2057 if (!insn || insn->op != OP_ABS || insn->sType != TYPE_S32 ||
2329 case OP_ABS:
|
| H A D | nv50_ir_emit_gm107.cpp | 795 emitField(0x31, 1, (insn->op == OP_ABS) || insn->src(0).mod.abs());
837 emitField(0x31, 1, (insn->op == OP_ABS) || insn->src(0).mod.abs());
879 emitField(0x31, 1, (insn->op == OP_ABS) || insn->src(0).mod.abs());
912 emitField(0x31, 1, (insn->op == OP_ABS) || insn->src(0).mod.abs());
3415 case OP_ABS:
|
| H A D | nv50_ir_emit_nv50.cpp | 1458 case OP_ABS: code[1] |= 1 << 20; break;
1469 assert(i->op != OP_ABS || !i->src(0).mod.neg());
1938 case OP_ABS:
|
| H A D | nv50_ir.h | 64 OP_ABS, enumerator in enum:nv50_ir::operation
|
| H A D | nv50_ir_lowering_nvc0.cpp | 783 case OP_ABS:
859 if (i->op == OP_SAT || i->op == OP_NEG || i->op == OP_ABS)
931 src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), i->getSrc(c));
1238 src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), crd[c]);
|
| H A D | nv50_ir_emit_gk110.cpp | 1071 case OP_ABS: abs = true; neg = false; break;
2613 case OP_ABS:
|
| H A D | nv50_ir.cpp | 38 case OP_ABS: bits = NV50_IR_MOD_ABS; break;
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_target_gm107.cpp | 246 case OP_ABS:
283 case OP_ABS:
|
| H A D | nv50_ir_target_nv50.cpp | 91 { OP_ABS, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1, 0x1, 0x0 },
473 case OP_ABS:
|
| H A D | nv50_ir_lowering_helper.cpp | 33 case OP_ABS:
|
| H A D | nv50_ir_target_nvc0.cpp | 111 { OP_ABS, 0x0, 0x0, 0x0, 0x0, 0x1, 0x0 },
488 case OP_ABS:
662 case OP_ABS:
|
| H A D | nv50_ir_lowering_gm107.cpp | 175 src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), crd[c]);
|
| H A D | nv50_ir_lowering_nv50.cpp | 98 bld->mkOp1(OP_ABS, mul->sType, s[0], mul->getSrc(0));
99 bld->mkOp1(OP_ABS, mul->sType, s[1], mul->getSrc(1));
530 bld.mkOp1(OP_ABS, ty, a, div->getSrc(0));
531 bld.mkOp1(OP_ABS, ty, b, div->getSrc(1));
788 src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), i->getSrc(c));
1029 src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), crd[c]);
1172 bld.mkOp1(OP_ABS, TYPE_S32, i->getDef(0), i->getDef(0));
|
| H A D | nv50_ir_peephole.cpp | 542 case NV50_IR_MOD_ABS: return OP_ABS;
883 case OP_ABS: res.data.f32 = fabsf(imm.reg.data.f32); break;
1311 Value *abs = bld.mkOp1v(OP_ABS, TYPE_S32, bld.getSSA(), i->getSrc(0));
1545 case OP_ABS:
1754 (mi->op != OP_ABS &&
1765 if ((i->op == OP_ABS) || i->src(s).mod.abs()) {
2110 if (!insn || insn->op != OP_ABS || insn->sType != TYPE_S32 ||
2382 case OP_ABS:
|
| H A D | nv50_ir_emit_gm107.cpp | 824 emitField(0x31, 1, (insn->op == OP_ABS) || insn->src(0).mod.abs());
866 emitField(0x31, 1, (insn->op == OP_ABS) || insn->src(0).mod.abs());
908 emitField(0x31, 1, (insn->op == OP_ABS) || insn->src(0).mod.abs());
941 emitField(0x31, 1, (insn->op == OP_ABS) || insn->src(0).mod.abs());
3480 case OP_ABS:
|
| H A D | nv50_ir_emit_nv50.cpp | 1532 case OP_ABS: code[1] |= 1 << 20; break;
1543 assert(i->op != OP_ABS || !i->src(0).mod.neg());
2025 case OP_ABS:
|
| H A D | nv50_ir.h | 64 OP_ABS, enumerator in enum:nv50_ir::operation
|
| H A D | nv50_ir_target_gv100.cpp | 208 case OP_ABS:
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| H A D | nv50_ir_emit_gk110.cpp | 1069 case OP_ABS: abs = true; neg = false; break;
2620 case OP_ABS:
|