| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_target_nvc0.cpp | 102 { OP_ADD, 0x3, 0x3, 0x0, 0x8, 0x2, 0x2 | 0x8 }, 198 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN, 204 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN 423 if (i->op == OP_ADD && i->sType == TYPE_F32) { 495 case OP_ADD: 537 return (insn->op == OP_ADD) || (insn->op == OP_MAD); 540 if (insn->op == OP_ADD && insn->sType == TYPE_F32) { 611 case OP_ADD: 638 case OP_ADD: 699 return (a->dType == TYPE_F32 || a->op == OP_ADD || [all...] |
| H A D | nv50_ir_target_nv50.cpp | 85 { OP_ADD, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 }, 116 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN, 121 OP_MOV, OP_ADD, OP_SUB, OP_MUL, OP_MAD, OP_SAD, OP_RCP, OP_LINTERP, 472 case OP_ADD:
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| H A D | nv50_ir_lowering_nv50.cpp | 123 i[6] = bld->mkOp2(OP_ADD, fTy, r[1], r[0], imm); 163 Instruction *n = bld->mkOp2(OP_ADD, fTy, NULL, rr[1], one); 169 bld->mkOp2(OP_ADD, fTy, rr[2], rr[0], one) 424 if (i->op == OP_ADD && i->src(0).getFile() == FILE_ADDRESS) 468 add->op = OP_ADD; 515 bf = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getSSA(), bf, bld.mkImm(-2)); 530 bld.mkOp2(OP_ADD, ty, (q = bld.getSSA()), q0, qR); // add quotients 696 *ms = bld.mkOp2v(OP_ADD, TYPE_U32, tmp, *ms_x, *ms_y); 709 bld.mkOp2v(OP_ADD, TYPE_U32, t, 761 bld.mkOp2(OP_ADD, TYPE_U3 [all...] |
| H A D | nv50_ir_lowering_nvc0.cpp | 245 bld.mkOp2(OP_ADD, TYPE_U32, (x32_minus_shift = bld.getSSA()), shift, bld.mkImm(0x20)) 813 cvt->op = OP_ADD; 1061 ticRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(), 1067 tscRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(), 1366 ticRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(), 1490 op = OP_ADD; 1582 op = OP_ADD; 1653 base = bld.mkOp2v(OP_ADD, TYPE_U64, base, base, ptr); 1663 bld.mkOp2(OP_ADD, TYPE_U32, offset, offset, ptr); 1684 base = bld.mkOp2v(OP_ADD, TYPE_U3 [all...] |
| H A D | nv50_ir_lowering_gm107.cpp | 58 bld.mkOp2(OP_ADD , TYPE_U32, src0, i->getSrc(0), i->getSrc(1)); 246 bld.mkOp2(OP_ADD , TYPE_U32, tmp2, i->getSrc(0), i->getSrc(1));
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| H A D | nv50_ir_target_gm107.cpp | 213 case OP_ADD:
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| H A D | nv50_ir_peephole.cpp | 323 if (insn->op == OP_ADD && !isFloatType(insn->dType)) { 603 case OP_ADD: 746 i->op = OP_ADD; 976 bld.mkOp2(OP_ADD, ty, def, res, c); 1000 bld.mkOp2(OP_ADD, TYPE_U32, def, res, c); 1103 i->op = OP_ADD; 1146 i->op = OP_ADD; 1162 case OP_ADD: 1219 newi = bld.mkOp2(OP_ADD, TYPE_U32, tB, mul->getDef(0), tA); 1299 newi = bld.mkOp2(OP_ADD, [all...] |
| H A D | nv50_ir.h | 52 OP_ADD, // NOTE: add u64 + u32 is legal for targets w/o 64-bit integer adds enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_build_util.cpp | 582 case OP_ADD:
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| H A D | nv50_ir_from_nir.cpp | 350 return OP_ADD; 2235 vtxBase = mkOp2v(OP_ADD, TYPE_U32, getSSA(4, FILE_ADDRESS), outBase, vtxBase); 3195 indirect = mkOp2v(OP_ADD, TYPE_U32, getSSA(), indirect, offset);
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| H A D | nv50_ir_emit_nvc0.cpp | 2719 case OP_ADD: 3004 if (i->op != OP_ADD || s != 0)
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_target_nvc0.cpp | 102 { OP_ADD, 0x3, 0x3, 0x0, 0x8, 0x2, 0x2 | 0x8 }, 198 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN, 204 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN 433 if (i->op == OP_ADD && i->sType == TYPE_F32) { 505 case OP_ADD: 547 return (insn->op == OP_ADD) || (insn->op == OP_MAD); 550 if (insn->op == OP_ADD && insn->sType == TYPE_F32) { 621 case OP_ADD: 648 case OP_ADD: 709 return (a->dType == TYPE_F32 || a->op == OP_ADD || [all...] |
| H A D | nv50_ir_lowering_gv100.cpp | 61 bld.mkOp2(OP_ADD, TYPE_U32, def[0], src[0][0], src[1][0])-> 63 bld.mkOp2(OP_ADD, TYPE_U32, def[1], src[0][1], src[1][1])-> 239 bld.mkOp2(OP_ADD, i->dType, i->getDef(0), i->getSrc(0), i->getSrc(1)); 308 case OP_ADD:
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| H A D | nv50_ir_target_nv50.cpp | 85 { OP_ADD, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 }, 116 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN, 121 OP_MOV, OP_ADD, OP_SUB, OP_MUL, OP_MAD, OP_SAD, OP_RCP, OP_LINTERP, 483 case OP_ADD:
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| H A D | nv50_ir_lowering_nv50.cpp | 141 i[6] = bld->mkOp2(OP_ADD, fTy, r[1], r[0], imm); 181 Instruction *n = bld->mkOp2(OP_ADD, fTy, NULL, rr[1], one); 187 bld->mkOp2(OP_ADD, fTy, rr[2], rr[0], one) 447 if (i->op == OP_ADD && i->src(0).getFile() == FILE_ADDRESS) 491 add->op = OP_ADD; 538 bf = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getSSA(), bf, bld.mkImm(-2)); 553 bld.mkOp2(OP_ADD, ty, (q = bld.getSSA()), q0, qR); // add quotients 732 *ms = bld.mkOp2v(OP_ADD, TYPE_U32, tmp, *ms_x, *ms_y); 745 bld.mkOp2v(OP_ADD, TYPE_U32, t, 815 bld.mkOp2(OP_ADD, TYPE_U3 [all...] |
| H A D | nv50_ir_lowering_nvc0.cpp | 245 bld.mkOp2(OP_ADD, TYPE_U32, (x32_minus_shift = bld.getSSA()), shift, bld.mkImm(0x20)) 824 cvt->op = OP_ADD; 1075 ticRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(), 1081 tscRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(), 1380 ticRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(), 1504 op = OP_ADD; 1596 op = OP_ADD; 1669 base = bld.mkOp2v(OP_ADD, TYPE_U64, base, base, ptr); 1679 bld.mkOp2(OP_ADD, TYPE_U32, offset, offset, ptr); 1700 base = bld.mkOp2v(OP_ADD, TYPE_U3 [all...] |
| H A D | nv50_ir_lowering_gm107.cpp | 58 bld.mkOp2(OP_ADD , TYPE_U32, src0, i->getSrc(0), i->getSrc(1)); 264 bld.mkOp2(OP_ADD , TYPE_U32, tmp2, i->getSrc(0), i->getSrc(1));
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| H A D | nv50_ir_target_gm107.cpp | 213 case OP_ADD:
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| H A D | nv50_ir_peephole.cpp | 325 if (insn->op == OP_ADD && !isFloatType(insn->dType)) { 619 case OP_ADD: 762 i->op = OP_ADD; 1009 bld.mkOp2(OP_ADD, ty, def, res, c); 1033 bld.mkOp2(OP_ADD, TYPE_U32, def, res, c); 1138 i->op = OP_ADD; 1182 i->op = OP_ADD; 1198 case OP_ADD: 1255 newi = bld.mkOp2(OP_ADD, TYPE_U32, tB, mul->getDef(0), tA); 1335 newi = bld.mkOp2(OP_ADD, [all...] |
| H A D | nv50_ir_target_gv100.cpp | 35 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_MAX, OP_MIN, 212 case OP_ADD: 415 case OP_ADD:
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| H A D | nv50_ir.h | 52 OP_ADD, // NOTE: add u64 + u32 is legal for targets w/o 64-bit integer adds enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_build_util.cpp | 612 case OP_ADD:
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| H A D | nv50_ir_emit_gv100.cpp | 1731 case OP_ADD:
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| H A D | nv50_ir_emit_nvc0.cpp | 2726 case OP_ADD: 3011 if (i->op != OP_ADD || s != 0)
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| H A D | nv50_ir_from_nir.cpp | 389 return OP_ADD; 1972 vtxBase = mkOp2v(OP_ADD, TYPE_U32, getSSA(4, FILE_ADDRESS), outBase, vtxBase);
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