| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_lowering_gm107.cpp | 98 case OP_QUADPOP:
201 bld.mkOp1(OP_QUADPOP, TYPE_U32, NULL, bar)->fixed = 1;
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| H A D | nv50_ir_target_gm107.cpp | 263 case OP_QUADPOP:
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| H A D | nv50_ir_target_nv50.cpp | 129 OP_QUADON, OP_QUADPOP, OP_TEXBAR, OP_SUSTB, OP_SUSTP, OP_SUREDP,
134 OP_CALL, OP_PREBREAK, OP_PRERET, OP_QUADON, OP_QUADPOP, OP_JOINAT,
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| H A D | nv50_ir_build_util.h | 272 op == OP_QUADON || op == OP_QUADPOP ||
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| H A D | nv50_ir_target_nvc0.cpp | 212 OP_QUADON, OP_QUADPOP, OP_TEXBAR, OP_SUSTB, OP_SUSTP, OP_SUREDP,
218 OP_CALL, OP_PRERET, OP_QUADON, OP_QUADPOP,
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| H A D | nv50_ir_lowering_gv100.cpp | 297 case OP_QUADPOP:
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| H A D | nv50_ir.h | 152 OP_QUADPOP, enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_emit_gk110.cpp | 1536 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
2688 case OP_QUADPOP:
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| H A D | nv50_ir_emit_nv50.cpp | 2102 case OP_QUADPOP:
2240 insn->op == OP_QUADPOP)
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| H A D | nv50_ir_emit_gm107.cpp | 3468 case OP_QUADPOP:
4005 insn->op == OP_QUADPOP) {
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| H A D | nv50_ir_emit_nvc0.cpp | 1483 case OP_QUADPOP: code[1] = 0xc8000000; mask = 0; break;
2882 case OP_QUADPOP:
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| H A D | nv50_ir_lowering_nv50.cpp | 1053 bld.mkOp(OP_QUADPOP, TYPE_NONE, NULL);
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| H A D | nv50_ir_lowering_nvc0.cpp | 1278 bld.mkOp(OP_QUADPOP, TYPE_NONE, NULL);
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_target_gm107.cpp | 263 case OP_QUADPOP:
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| H A D | nv50_ir_target_nv50.cpp | 129 OP_QUADON, OP_QUADPOP, OP_TEXBAR, OP_SUSTB, OP_SUSTP, OP_SUREDP,
134 OP_CALL, OP_PREBREAK, OP_PRERET, OP_QUADON, OP_QUADPOP, OP_JOINAT,
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| H A D | nv50_ir_build_util.h | 266 op == OP_QUADON || op == OP_QUADPOP ||
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| H A D | nv50_ir_lowering_gm107.cpp | 182 bld.mkOp(OP_QUADPOP, TYPE_NONE, NULL);
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| H A D | nv50_ir_target_nvc0.cpp | 212 OP_QUADON, OP_QUADPOP, OP_TEXBAR, OP_SUSTB, OP_SUSTP, OP_SUREDP,
218 OP_CALL, OP_PRERET, OP_QUADON, OP_QUADPOP,
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| H A D | nv50_ir.h | 149 OP_QUADPOP, enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_emit_gk110.cpp | 1529 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
2681 case OP_QUADPOP:
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| H A D | nv50_ir_emit_nv50.cpp | 2015 case OP_QUADPOP:
2153 insn->op == OP_QUADPOP)
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| H A D | nv50_ir_lowering_nv50.cpp | 999 bld.mkOp(OP_QUADPOP, TYPE_NONE, NULL);
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| H A D | nv50_ir_emit_gm107.cpp | 3403 case OP_QUADPOP:
4082 insn->op == OP_QUADPOP) {
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| H A D | nv50_ir_emit_nvc0.cpp | 1476 case OP_QUADPOP: code[1] = 0xc8000000; mask = 0; break;
2875 case OP_QUADPOP:
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| H A D | nv50_ir_lowering_nvc0.cpp | 1264 bld.mkOp(OP_QUADPOP, TYPE_NONE, NULL);
|