| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_target_gm107.cpp | 166 case OP_RDSV:
244 case OP_RDSV:
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| H A D | nv50_ir_from_nir.cpp | 1582 mkOp1v(OP_RDSV, TYPE_U32, getSSA(), mkSysVal(SV_LANEID, 0)),
1583 mkOp1v(OP_RDSV, TYPE_U32, getSSA(), mkSysVal(SV_INVOCATION_ID, 0)));
1587 fragCoord[3] = mkOp1v(OP_RDSV, TYPE_F32, getSSA(), sv);
1975 Value *x = mkOp1v(OP_RDSV, TYPE_F32, getSSA(), mkSysVal(SV_POSITION, 0));
1976 Value *y = mkOp1v(OP_RDSV, TYPE_F32, getSSA(), mkSysVal(SV_POSITION, 1));
1980 srcs.push_back(mkOp1v(OP_RDSV, TYPE_U32, getSSA(), mkSysVal(SV_LAYER, 0)));
1981 srcs.push_back(mkOp1v(OP_RDSV, TYPE_U32, getSSA(), mkSysVal(SV_SAMPLE_INDEX, 0)));
2152 Instruction *rdsv = mkOp1(OP_RDSV, TYPE_U32, def, sym);
2608 mkOp1(OP_RDSV, dType, newDefs[1], mkSysVal(SV_CLOCK, 0))->fixed = 1;
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| H A D | nv50_ir_lowering_gm107.cpp | 241 bld.mkOp1(OP_RDSV, TYPE_U32, tmp0, bld.mkSysVal(SV_INVOCATION_INFO, 0));
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| H A D | nv50_ir_from_tgsi.cpp | 2075 return mkOp1v(OP_RDSV, TYPE_U32, getSSA(), mkSysVal(SV_PRIMITIVE_ID, 0));
2101 ld = mkOp1(OP_RDSV, TYPE_U32, getSSA(), srcToSym(src, c));
2483 Value *x = mkOp1v(OP_RDSV, TYPE_F32, getScratch(), mkSysVal(SV_POSITION, 0));
2484 Value *y = mkOp1v(OP_RDSV, TYPE_F32, getScratch(), mkSysVal(SV_POSITION, 1));
2485 Value *z = mkOp1v(OP_RDSV, TYPE_U32, getScratch(), mkSysVal(SV_LAYER, 0));
2486 Value *ms = mkOp1v(OP_RDSV, TYPE_U32, getScratch(), mkSysVal(SV_SAMPLE_INDEX, 0));
3112 w = mkOp2v(OP_RDSV, TYPE_F32, getSSA(), mkSysVal(SV_POSITION, 3), offset);
3456 mkOp1(OP_RDSV, TYPE_U32, dst0[1], mkSysVal(SV_CLOCK, 0))->fixed = 1;
4332 mkOp1v(OP_RDSV, TYPE_U32, getSSA(), mkSysVal(SV_LANEID, 0)),
4333 mkOp1v(OP_RDSV, TYPE_U3
[all...] |
| H A D | nv50_ir_lowering_nv50.cpp | 1209 bld.mkOp1(OP_RDSV, TYPE_U32, def, bld.mkSysVal(SV_SAMPLE_INDEX, 0));
1309 Value *vstride = bld.mkOp1v(OP_RDSV, TYPE_U32, bld.getSSA(), sv);
1431 case OP_RDSV:
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| H A D | nv50_ir.h | 144 OP_RDSV, // read system value enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_lowering_nvc0.cpp | 1679 bld.mkOp1v(OP_RDSV, TYPE_U32, bld.getScratch(), bld.mkSysVal(sv, 0));
2690 bld.mkOp1(OP_RDSV, TYPE_U32, laneid, bld.mkSysVal(SV_LANEID, 0));
2737 Value *tid = bld.mkOp1v(OP_RDSV, TYPE_U32, bld.getScratch(),
3122 case OP_RDSV:
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| H A D | nv50_ir_emit_gk110.cpp | 2512 case OP_RDSV:
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| H A D | nv50_ir_emit_nv50.cpp | 1878 case OP_RDSV:
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| H A D | nv50_ir_peephole.cpp | 2292 if (rdsv->op != OP_RDSV ||
2317 i->op = OP_RDSV;
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| H A D | nv50_ir_emit_gm107.cpp | 3409 case OP_RDSV:
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| H A D | nv50_ir_emit_nvc0.cpp | 2688 case OP_RDSV:
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_target_gm107.cpp | 166 case OP_RDSV:
244 case OP_RDSV:
|
| H A D | nv50_ir_from_tgsi.cpp | 2057 return mkOp1v(OP_RDSV, TYPE_U32, getSSA(), mkSysVal(SV_PRIMITIVE_ID, 0));
2083 ld = mkOp1(OP_RDSV, TYPE_U32, getSSA(), srcToSym(src, c));
2471 Value *x = mkOp1v(OP_RDSV, TYPE_F32, getScratch(), mkSysVal(SV_POSITION, 0));
2472 Value *y = mkOp1v(OP_RDSV, TYPE_F32, getScratch(), mkSysVal(SV_POSITION, 1));
2473 Value *z = mkOp1v(OP_RDSV, TYPE_U32, getScratch(), mkSysVal(SV_LAYER, 0));
2474 Value *ms = mkOp1v(OP_RDSV, TYPE_U32, getScratch(), mkSysVal(SV_SAMPLE_INDEX, 0));
3135 w = mkOp2v(OP_RDSV, TYPE_F32, getSSA(), mkSysVal(SV_POSITION, 3), offset);
3480 mkOp1(OP_RDSV, TYPE_U32, dst0[1], mkSysVal(SV_CLOCK, 0))->fixed = 1;
3484 mkOp1(OP_RDSV, TYPE_U32, dst0[0], mkSysVal(SV_THREAD_KILL, 0))
4365 mkOp1v(OP_RDSV, TYPE_U3
[all...] |
| H A D | nv50_ir_from_nir.cpp | 1370 mkOp1v(OP_RDSV, TYPE_U32, getSSA(), mkSysVal(SV_LANEID, 0)),
1371 mkOp1v(OP_RDSV, TYPE_U32, getSSA(), mkSysVal(SV_INVOCATION_ID, 0)));
1375 fragCoord[3] = mkOp1v(OP_RDSV, TYPE_F32, getSSA(), sv);
1695 Value *x = mkOp1v(OP_RDSV, TYPE_F32, getSSA(), mkSysVal(SV_POSITION, 0));
1696 Value *y = mkOp1v(OP_RDSV, TYPE_F32, getSSA(), mkSysVal(SV_POSITION, 1));
1700 srcs.push_back(mkOp1v(OP_RDSV, TYPE_U32, getSSA(), mkSysVal(SV_LAYER, 0)));
1701 srcs.push_back(mkOp1v(OP_RDSV, TYPE_U32, getSSA(), mkSysVal(SV_SAMPLE_INDEX, 0)));
1889 Instruction *rdsv = mkOp1(OP_RDSV, TYPE_U32, def, sym);
2347 mkOp1(OP_RDSV, dType, newDefs[1], mkSysVal(SV_CLOCK, 0))->fixed = 1;
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| H A D | nv50_ir_lowering_gm107.cpp | 260 bld.mkOp1(OP_RDSV, TYPE_U32, tmp0, bld.mkSysVal(SV_INVOCATION_INFO, 0));
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| H A D | nv50_ir.h | 147 OP_RDSV, // read system value enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_lowering_nv50.cpp | 1321 bld.mkOp1(OP_RDSV, TYPE_U32, def, bld.mkSysVal(SV_SAMPLE_INDEX, 0));
1435 Value *vstride = bld.mkOp1v(OP_RDSV, TYPE_U32, bld.getSSA(), sv);
1633 Value *physid = bld.mkOp1v(OP_RDSV, TYPE_U32, bld.getSSA(), bld.mkSysVal(SV_PHYSID, 0));
2243 case OP_RDSV:
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| H A D | nv50_ir_target_gv100.cpp | 335 case OP_RDSV:
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| H A D | nv50_ir_lowering_nvc0.cpp | 1695 bld.mkOp1v(OP_RDSV, TYPE_U32, bld.getScratch(), bld.mkSysVal(sv, 0));
2904 bld.mkOp1(OP_RDSV, TYPE_U32, laneid, bld.mkSysVal(SV_LANEID, 0));
2951 Value *tid = bld.mkOp1v(OP_RDSV, TYPE_U32, bld.getScratch(),
3336 case OP_RDSV:
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| H A D | nv50_ir_emit_gv100.cpp | 1915 case OP_RDSV:
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| H A D | nv50_ir_emit_gk110.cpp | 2519 case OP_RDSV:
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| H A D | nv50_ir_emit_nv50.cpp | 1965 case OP_RDSV:
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| H A D | nv50_ir_peephole.cpp | 2345 if (rdsv->op != OP_RDSV ||
2370 i->op = OP_RDSV;
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| H A D | nv50_ir_emit_gm107.cpp | 3474 case OP_RDSV:
|