Searched refs:OP_SUB (Results 1 - 25 of 32) sorted by relevance

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/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_lowering_helper.cpp70 bld.mkOp2(OP_SUB, dTy, neg, bld.mkImm((uint64_t)0), insn->getSrc(0));
184 insn->op = OP_SUB;
H A Dnv50_ir_target_nv50.cpp86 { OP_SUB, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
121 OP_MOV, OP_ADD, OP_SUB, OP_MUL, OP_MAD, OP_SAD, OP_RCP, OP_LINTERP,
476 case OP_SUB:
H A Dnv50_ir_target_gm107.cpp237 case OP_SUB:
H A Dnv50_ir_lowering_nv50.cpp523 bld.mkOp2(OP_SUB, TYPE_U32, (aRf = bld.getSSA()), a, t);
535 bld.mkOp2(OP_SUB, TYPE_U32, (m = bld.getSSA()), a, t);
538 div->op = OP_SUB;
543 bld.mkOp2(OP_SUB, TYPE_U32, (q = bld.getSSA()), t, s);
574 mod->op = OP_SUB;
H A Dnv50_ir_emit_gk110.cpp665 Modifier(i->op == OP_SUB ? NV50_IR_MOD_NEG : 0);
683 if (i->op == OP_SUB) code[1] ^= 1 << 27;
687 if (i->op == OP_SUB) code[1] ^= 1 << 16;
704 if (i->op == OP_SUB) code[1] ^= 1 << 27;
708 if (i->op == OP_SUB) code[1] ^= 1 << 16;
717 if (i->op == OP_SUB)
2544 case OP_SUB:
H A Dnv50_ir_peephole.cpp196 insn->op != OP_SUB && insn->op != OP_XMAD)
244 if (insn->op == OP_SUB) {
331 } else if (insn->op == OP_SUB && !isFloatType(insn->dType)) {
613 case OP_SUB:
1157 case OP_SUB:
1169 if (i->op == OP_SUB)
1212 bld.mkOp2(OP_SUB, TYPE_U32, tB, i->getSrc(0), tA);
1252 newi = bld.mkOp2(OP_SUB, TYPE_U32, tD, tB, tA);
1466 case OP_SUB:
1471 if (si->op != OP_SUB
[all...]
H A Dnv50_ir_from_tgsi.cpp3285 mkOp2(OP_SUB, TYPE_F32, dst0[1], src0, val0);
3342 mkOp2v(OP_SUB, TYPE_F32, getSSA(), src1, src2), src0, src2)
3358 mkOp2(OP_SUB, TYPE_F32, dst0[c], val0, val1);
3360 mkOp2(OP_SUB, TYPE_S32, dst0[c], val1, val0);
3383 mkOp2(OP_SUB, TYPE_F32, dst0[c], src0, val0);
3948 mkOp2(OP_SUB, dstTy, dst, zero, src0);
3960 mkOp2(OP_SUB, dstTy, neg, zero, src0);
3996 mkOp2(OP_SUB, TYPE_F64, dst, src0, dst);
4138 mkOp2(OP_SUB, TYPE_F32, dstF32, val0, val1);
4156 mkOp2(OP_SUB, TYPE_S3
[all...]
H A Dnv50_ir_target_nvc0.cpp103 { OP_SUB, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 | 0x8 },
501 case OP_SUB:
H A Dnv50_ir_emit_nv50.cpp1027 const int neg1 = i->src(1).mod.neg() ^ ((i->op == OP_SUB) ? 1 : 0);
1061 const int neg1 = i->src(1).mod.neg() ^ ((i->op == OP_SUB) ? 1 : 0);
1080 const int neg1 = i->src(1).mod.neg() ^ ((i->op == OP_SUB) ? 1 : 0);
1886 case OP_SUB:
H A Dnv50_ir_emit_nvc0.cpp680 if ((i->op == OP_SUB) != static_cast<bool>(i->src(1).mod.neg()))
690 if (i->op == OP_SUB) code[0] ^= 1 << 8;
695 assert(!i->saturate && i->op != OP_SUB &&
715 if (i->op == OP_SUB)
730 if (i->op == OP_SUB)
2720 case OP_SUB:
H A Dnv50_ir_from_nir.cpp456 return OP_SUB;
1581 OP_SUB, TYPE_U32, getSSA(),
2962 mkOp2(OP_SUB, iType, val0, val0, val1);
2965 mkOp2(OP_SUB, iType, val0, val1, val0);
2969 mkOp2(OP_SUB, iType, newDefs[0], val0, val1);
2971 mkOp2(OP_SUB, iType, newDefs[0], val1, val0);
H A Dnv50_ir_emit_gm107.cpp1040 if (insn->op == OP_SUB)
1280 if (insn->op == OP_SUB)
1292 if (insn->op == OP_SUB)
1776 if (insn->op == OP_SUB)
3441 case OP_SUB:
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_lowering_helper.cpp70 bld.mkOp2(OP_SUB, dTy, neg, bld.mkImm((uint64_t)0), insn->getSrc(0));
184 insn->op = OP_SUB;
H A Dnv50_ir_target_nv50.cpp86 { OP_SUB, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
121 OP_MOV, OP_ADD, OP_SUB, OP_MUL, OP_MAD, OP_SAD, OP_RCP, OP_LINTERP,
487 case OP_SUB:
H A Dnv50_ir_target_gm107.cpp237 case OP_SUB:
H A Dnv50_ir_emit_gk110.cpp663 Modifier(i->op == OP_SUB ? NV50_IR_MOD_NEG : 0);
681 if (i->op == OP_SUB) code[1] ^= 1 << 27;
685 if (i->op == OP_SUB) code[1] ^= 1 << 16;
702 if (i->op == OP_SUB) code[1] ^= 1 << 27;
706 if (i->op == OP_SUB) code[1] ^= 1 << 16;
715 if (i->op == OP_SUB)
2551 case OP_SUB:
H A Dnv50_ir_peephole.cpp196 insn->op != OP_SUB && insn->op != OP_XMAD)
244 if (insn->op == OP_SUB) {
333 } else if (insn->op == OP_SUB && !isFloatType(insn->dType)) {
629 case OP_SUB:
1193 case OP_SUB:
1205 if (i->op == OP_SUB)
1248 bld.mkOp2(OP_SUB, TYPE_U32, tB, i->getSrc(0), tA);
1288 newi = bld.mkOp2(OP_SUB, TYPE_U32, tD, tB, tA);
1513 case OP_SUB:
1518 if (si->op != OP_SUB
[all...]
H A Dnv50_ir_from_tgsi.cpp3308 mkOp2(OP_SUB, TYPE_F32, dst0[1], src0, val0);
3365 mkOp2v(OP_SUB, TYPE_F32, getSSA(), src1, src2), src0, src2)
3381 mkOp2(OP_SUB, TYPE_F32, dst0[c], val0, val1);
3383 mkOp2(OP_SUB, TYPE_S32, dst0[c], val1, val0);
3406 mkOp2(OP_SUB, TYPE_F32, dst0[c], src0, val0);
3980 mkOp2(OP_SUB, dstTy, dst, zero, src0);
3992 mkOp2(OP_SUB, dstTy, neg, zero, src0);
4028 mkOp2(OP_SUB, TYPE_F64, dst, src0, dst);
4170 mkOp2(OP_SUB, TYPE_F32, dstF32, val0, val1);
4188 mkOp2(OP_SUB, TYPE_S3
[all...]
H A Dnv50_ir_target_nvc0.cpp103 { OP_SUB, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 | 0x8 },
511 case OP_SUB:
H A Dnv50_ir_emit_nv50.cpp1034 const int neg1 = i->src(1).mod.neg() ^ ((i->op == OP_SUB) ? 1 : 0);
1068 const int neg1 = i->src(1).mod.neg() ^ ((i->op == OP_SUB) ? 1 : 0);
1087 const int neg1 = i->src(1).mod.neg() ^ ((i->op == OP_SUB) ? 1 : 0);
1973 case OP_SUB:
H A Dnv50_ir_lowering_gv100.cpp300 case OP_SUB:
H A Dnv50_ir_emit_nvc0.cpp678 if ((i->op == OP_SUB) != static_cast<bool>(i->src(1).mod.neg()))
688 if (i->op == OP_SUB) code[0] ^= 1 << 8;
693 assert(!i->saturate && i->op != OP_SUB &&
713 if (i->op == OP_SUB)
728 if (i->op == OP_SUB)
2727 case OP_SUB:
H A Dnv50_ir_emit_gm107.cpp1078 if (insn->op == OP_SUB)
1318 if (insn->op == OP_SUB)
1330 if (insn->op == OP_SUB)
1814 if (insn->op == OP_SUB)
3506 case OP_SUB:
H A Dnv50_ir_from_nir.cpp1369 OP_SUB, TYPE_U32, getSSA(),
2684 mkOp2(OP_SUB, iType, val0, val0, val1);
2687 mkOp2(OP_SUB, iType, val0, val1, val0);
2691 mkOp2(OP_SUB, iType, newDefs[0], val0, val1);
2693 mkOp2(OP_SUB, iType, newDefs[0], val1, val0);
H A Dnv50_ir_lowering_nv50.cpp546 bld.mkOp2(OP_SUB, TYPE_U32, (aRf = bld.getSSA()), a, t);
558 bld.mkOp2(OP_SUB, TYPE_U32, (m = bld.getSSA()), a, t);
561 div->op = OP_SUB;
566 bld.mkOp2(OP_SUB, TYPE_U32, (q = bld.getSSA()), t, s);
597 mod->op = OP_SUB;

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