Searched refs:OUTREGP (Results 1 - 11 of 11) sorted by relevance

/xsrc/external/mit/xf86-video-r128/dist/src/
H A Dr128_cursor.c75 OUTREGP(R128_CRTC_GEN_CNTL, R128_CRTC_CUR_EN, ~R128_CRTC_CUR_EN);
78 OUTREGP(R128_CRTC2_GEN_CNTL, R128_CRTC2_CUR_EN, ~R128_CRTC2_CUR_EN);
95 OUTREGP(R128_CRTC_GEN_CNTL, 0, ~R128_CRTC_CUR_EN);
98 OUTREGP(R128_CRTC2_GEN_CNTL, 0, ~R128_CRTC2_CUR_EN);
H A Dr128_output.c80 OUTREGP(R128_DAC_CNTL, restore->dac_cntl,
232 OUTREGP(R128_LVDS_GEN_CNTL, R128_LVDS_BLON, ~R128_LVDS_BLON);
234 OUTREGP(R128_LVDS_GEN_CNTL, R128_LVDS_ON, ~R128_LVDS_ON);
239 OUTREGP(R128_FP_GEN_CNTL, (R128_FP_FPON | R128_FP_TMDS_EN), ~(R128_FP_FPON | R128_FP_TMDS_EN));
243 OUTREGP(R128_CRTC_EXT_CNTL, R128_CRTC_CRT_ON, ~R128_CRTC_CRT_ON);
272 OUTREGP(R128_LVDS_GEN_CNTL, 0, ~(R128_LVDS_BLON | R128_LVDS_ON));
277 OUTREGP(R128_FP_GEN_CNTL, 0, ~(R128_FP_FPON | R128_FP_TMDS_EN));
281 OUTREGP(R128_CRTC_EXT_CNTL, 0, ~(R128_CRTC_CRT_ON));
H A Dr128_crtc.c260 OUTREGP(R128_CRTC_EXT_CNTL, restore->crtc_ext_cntl,
278 OUTREGP(R128_CRTC2_GEN_CNTL, restore->crtc2_gen_cntl,
512 OUTREGP(R128_CLOCK_CNTL_INDEX, R128_PLL_DIV_SEL, ~(R128_PLL_DIV_SEL));
587 OUTREGP(R128_CLOCK_CNTL_INDEX, 0, R128_PLL2_DIV_SEL_MASK);
810 OUTREGP(R128_CRTC2_GEN_CNTL, 0, ~mask);
812 OUTREGP(R128_CRTC_EXT_CNTL, 0, ~mask);
817 OUTREGP(R128_CRTC2_GEN_CNTL, R128_CRTC2_DISP_DIS, ~mask);
819 OUTREGP(R128_CRTC_EXT_CNTL, (R128_CRTC_DISPLAY_DIS | R128_CRTC_HSYNC_DIS), ~mask);
824 OUTREGP(R128_CRTC2_GEN_CNTL, R128_CRTC2_DISP_DIS, ~mask);
826 OUTREGP(R128_CRTC_EXT_CNT
[all...]
H A Dr128_accel.c117 OUTREGP(R128_PC_NGUI_CTLSTAT, R128_PC_FLUSH_ALL, ~R128_PC_FLUSH_ALL);
1077 OUTREGP(R128_DP_DATATYPE, 0, ~R128_HOST_BIG_ENDIAN_EN);
1080 OUTREGP(R128_DP_DATATYPE,
1083 OUTREGP(R128_DP_DATATYPE, 0, ~R128_HOST_BIG_ENDIAN_EN);
H A Dr128_reg.h63 #define OUTREGP(addr, val, mask) \ macro
/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dlegacy_crtc.c151 OUTREGP(RADEON_CRTC_EXT_CNTL,
327 OUTREGP(RADEON_CLOCK_CNTL_INDEX,
350 OUTREGP(RADEON_CLOCK_CNTL_INDEX,
686 OUTREGP(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_EN, ~(RADEON_CRTC2_EN | mask));
688 OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_EN, ~(RADEON_CRTC_EN | RADEON_CRTC_DISP_REQ_EN_B));
689 OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask);
696 OUTREGP(RADEON_CRTC2_GEN_CNTL, mask, ~(RADEON_CRTC2_EN | mask));
698 OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~(RADEON_CRTC_EN | RADEON_CRTC_DISP_REQ_EN_B));
699 OUTREGP(RADEON_CRTC_EXT_CNTL, mask, ~mask);
H A Dradeon_cursor.c213 OUTREGP(RADEON_MM_DATA, RADEON_CRTC_CUR_EN | 2 << 20,
247 OUTREGP(RADEON_MM_DATA, 0, ~RADEON_CRTC_CUR_EN);
H A Dradeon_macros.h73 #define OUTREGP(addr, val, mask) \ macro
H A Dradeon_accel.c196 OUTREGP(RADEON_RB3D_DSTCACHE_CTLSTAT,
209 OUTREGP(R300_DSTCACHE_CTLSTAT,
394 OUTREGP(RADEON_DP_DATATYPE,
398 OUTREGP(RADEON_DP_DATATYPE, 0, ~RADEON_HOST_BIG_ENDIAN_EN);
H A Dlegacy_output.c253 OUTREGP(RADEON_GPIOPAD_A, restore->gpiopad_a, ~1);
255 OUTREGP(RADEON_DAC_CNTL,
1878 OUTREGP(RADEON_GPIOPAD_A, 1, ~1 );
1947 OUTREGP(RADEON_GPIOPAD_A, gpiopad_a, ~1 );
1973 OUTREGP(RADEON_GPIOPAD_A, 0, ~1 );
2027 OUTREGP(RADEON_GPIOPAD_A, gpiopad_a, ~1);
H A Dradeon_driver.c1706 OUTREGP (RADEON_HOST_PATH_CNTL, RADEON_HDP_APER_CNTL,

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