Searched refs:PACKET3 (Results 1 - 3 of 3) sorted by relevance

/xsrc/external/mit/libdrm/dist/tests/amdgpu/
H A Dshader_test_util.c23 #define PACKET3(op, n) ((PACKET_TYPE3 << 30) | \ macro
26 #define PACKET3_COMPUTE(op, n) PACKET3(op, n) | (1 << 1)
137 ptr[i++] = PACKET3(PACKET3_CONTEXT_CONTROL, 1);
249 ptr[i++] = PACKET3(PACKET3_SET_UCONFIG_REG, 1);
288 ptr[i++] = PACKET3(PACKET3_SET_UCONFIG_REG, 1);
961 ptr[i++] = PACKET3(PACKET3_SET_UCONFIG_REG, 1);
965 ptr[i++] = PACKET3(PACKET3_SET_UCONFIG_REG, 1);
996 ptr[i++] = PACKET3(PACKET3_SET_CONTEXT_REG, 15);
1007 ptr[i++] = PACKET3(PACKET3_SET_CONTEXT_REG, 1);
1012 ptr[i++] = PACKET3(PACKET3_SET_CONTEXT_RE
[all...]
H A Dbasic_tests.c150 #define PACKET3(op, n) ((PACKET_TYPE3 << 30) | \ macro
153 #define PACKET3_COMPUTE(op, n) PACKET3(op, n) | (1 << 1)
1392 ptr[0]=PACKET3(PACKET3_NOP, 14);
1642 pm4[i++] = PACKET3(PACKET3_WRITE_DATA, 2 + sdma_write_length);
1663 pm4[i++] = PACKET3(PACKET3_ATOMIC_MEM, 7);
1850 pm4[i++] = PACKET3(PACKET3_DMA_DATA_SI, 4);
1860 pm4[i++] = PACKET3(PACKET3_DMA_DATA, 5);
2003 pm4[i++] = PACKET3(PACKET3_DMA_DATA_SI, 4);
2014 pm4[i++] = PACKET3(PACKET3_DMA_DATA, 5);
2312 ptr[i++] = PACKET3(PKT3_CONTEXT_CONTRO
[all...]
H A Ddeadlock_tests.c49 #define PACKET3(op, n) ((PACKET_TYPE3 << 30) | \ macro
273 ptr[0] = PACKET3(PACKET3_WAIT_REG_MEM, 5);
459 ptr[i++] = PACKET3(PACKET3_WRITE_DATA, 3);

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