Searched refs:PIOOffset (Results 1 - 17 of 17) sorted by relevance

/xsrc/external/mit/xorg-server.old/dist/hw/xfree86/vgahw/
H A DvgaHW.c166 outb(hwp->IOBase + hwp->PIOOffset + VGA_CRTC_INDEX_OFFSET, index);
167 outb(hwp->IOBase + hwp->PIOOffset + VGA_CRTC_DATA_OFFSET, value);
173 outb(hwp->IOBase + hwp->PIOOffset + VGA_CRTC_INDEX_OFFSET, index);
174 return inb(hwp->IOBase + hwp->PIOOffset + VGA_CRTC_DATA_OFFSET);
180 outb(hwp->PIOOffset + VGA_GRAPH_INDEX, index);
181 outb(hwp->PIOOffset + VGA_GRAPH_DATA, value);
187 outb(hwp->PIOOffset + VGA_GRAPH_INDEX, index);
188 return inb(hwp->PIOOffset + VGA_GRAPH_DATA);
194 outb(hwp->PIOOffset + VGA_SEQ_INDEX, index);
195 outb(hwp->PIOOffset
[all...]
H A DvgaHW.h154 IOADDRESS PIOOffset; /* offset + vgareg member in struct:_vgaHWRec
182 (void)inb((hw)->PIOOffset + (hw)->IOBase + VGA_IN_STAT_1_OFFSET); \
183 (void)inb((hw)->PIOOffset + (hw)->IOBase + VGA_IN_STAT_1_OFFSET); \
/xsrc/external/mit/xf86-video-openchrome/dist/src/
H A Dvia_vgahw.c38 #define PIOOFFSET hwp->PIOOffset
/xsrc/external/mit/xf86-video-rendition/dist/src/
H A Drendition.c369 save_misc = inb(pvgaHW->PIOOffset + VGA_MISC_OUT_R);
373 outb(pvgaHW->PIOOffset + VGA_MISC_OUT_W, save_misc);
377 outb(pvgaHW->PIOOffset + VGA_MISC_OUT_W,
658 pRendition->board.vgaio_base = pvgaHW->PIOOffset;
/xsrc/external/mit/xf86-video-tseng/dist/src/
H A Dtseng_mode.c45 outb(hwp->PIOOffset + VGA_BANK, value);
58 return inb(hwp->PIOOffset + VGA_BANK);
73 outb(hwp->PIOOffset + VGA_SEGMENT, value);
86 return inb(hwp->PIOOffset + VGA_SEGMENT);
105 outb(hwp->PIOOffset + VGA_MODE_CONTROL, value);
134 tmp = inb(hwp->PIOOffset + VGA_HERCULES);
145 outb(hwp->PIOOffset + VGA_HERCULES, tmp);
/xsrc/external/mit/xf86-video-s3virge/dist/src/
H A Ds3v_driver.c3515 unsigned int PIOOffset = 0; local in function:S3VEnableMmio
3523 PIOOffset = hwp->PIOOffset;
3538 val = inb(PIOOffset + 0x3C3); /*@@@EE*/
3539 outb(PIOOffset + 0x3C3, val | 0x01);
3545 val = inb(PIOOffset + VGA_MISC_OUT_R); /*@@@EE*/
3546 outb(PIOOffset + VGA_MISC_OUT_W, val | 0x01);
3548 vgaCRIndex = PIOOffset + hwp->IOBase + 4;
3567 outb(PIOOffset + VGA_MISC_OUT_W, val);
3591 vgaCRIndex += hwp->PIOOffset;
[all...]
/xsrc/external/mit/xf86-video-ark/dist/src/
H A Dark_driver.c50 #define PIOOFFSET hwp->PIOOffset
/xsrc/external/mit/xf86-video-xgi/dist/src/
H A Dxgi_driver.c2786 /* We "patch" the PIOOffset inside vgaHW in order to force
2789 VGAHWPTR(pScrn)->PIOOffset = pXGI->IODBase - 0x380 +
4538 /* Reset our PIOOffset as vgaHWInit might have reset it */
4539 VGAHWPTR(pScrn)->PIOOffset = pXGI->IODBase - 0x380 +
4820 /* Patch the PIOOffset inside vgaHW to use
4823 VGAHWPTR(pScrn)->PIOOffset = pXGI->IODBase - 0x380 +
/xsrc/external/mit/xf86-video-siliconmotion/dist/src/
H A Dsmi_driver.c445 pSmi->PIOBase = hwp->PIOOffset;
/xsrc/external/mit/xf86-video-apm/dist/src/
H A Dapm_driver.c423 #define PIOOFFSET hwp->PIOOffset
/xsrc/external/mit/xf86-video-cirrus/dist/src/
H A Dalp_driver.c495 pCir->PIOReg = hwp->PIOOffset + 0x3CE;
H A Dlg_driver.c438 pCir->PIOReg = hwp->PIOOffset + 0x3CE;
/xsrc/external/mit/xf86-video-i128/dist/src/
H A Di128_driver.c648 iobase += hwp->PIOOffset;
/xsrc/external/mit/xf86-video-ast/dist/src/
H A Dast_driver.c545 /* "Patch" the PIOOffset inside vgaHW in order to force
548 VGAHWPTR(pScrn)->PIOOffset =
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di810_driver.c570 pI810->ioBase = hwp->PIOOffset;
/xsrc/external/mit/xf86-video-trident/dist/src/
H A Dtrident_driver.c1974 pTrident->PIOBase = hwp->PIOOffset;
/xsrc/external/mit/xf86-video-chips/dist/src/
H A Dct_driver.c1390 cPtr->PIOBase = hwp->PIOOffset;

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