Searched refs:RT_DVSCLK_SEL_27MHZ (Results 1 - 1 of 1) sorted by relevance

/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dtheatre_reg.h380 #define RT_DVSCLK_SEL_27MHZ 0x1 macro

Completed in 4 milliseconds