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    Searched refs:SET (Results 1 - 10 of 10) sorted by relevancy

  /xsrc/external/mit/freetype/dist/src/base/
md5.c 66 * SET reads 4 input bytes in little-endian byte order and stores them in a
81 #define SET(n) \
84 SET(n)
86 #define SET(n) \
120 STEP(F, a, b, c, d, SET(0), 0xd76aa478, 7)
121 STEP(F, d, a, b, c, SET(1), 0xe8c7b756, 12)
122 STEP(F, c, d, a, b, SET(2), 0x242070db, 17)
123 STEP(F, b, c, d, a, SET(3), 0xc1bdceee, 22)
124 STEP(F, a, b, c, d, SET(4), 0xf57c0faf, 7)
125 STEP(F, d, a, b, c, SET(5), 0x4787c62a, 12
    [all...]
  /xsrc/external/mit/MesaLib/dist/src/amd/common/
ac_shadowed_regs.c 26 /* These tables define the set of ranges of registers we shadow when
1505 #define SET(array) ARRAY_SIZE(array), array
1507 set_context_reg_seq_array(cs, R_028000_DB_RENDER_CONTROL, SET(DbRenderControlGfx9));
1508 set_context_reg_seq_array(cs, R_0281E8_COHER_DEST_BASE_HI_0, SET(CoherDestBaseHi0Gfx9));
1510 SET(VgtMultiPrimIbResetIndxGfx9));
1511 set_context_reg_seq_array(cs, R_028414_CB_BLEND_RED, SET(CbBlendRedGfx9));
1512 set_context_reg_seq_array(cs, R_028644_SPI_PS_INPUT_CNTL_0, SET(SpiPsInputCntl0Gfx9));
1513 set_context_reg_seq_array(cs, R_028754_SX_PS_DOWNCONVERT, SET(SxPsDownconvertGfx9));
1514 set_context_reg_seq_array(cs, R_028800_DB_DEPTH_CONTROL, SET(DbDepthControlGfx9));
1515 set_context_reg_seq_array(cs, R_02882C_PA_SU_PRIM_FILTER_CNTL, SET(PaSuPrimFilterCntlGfx9))
    [all...]
  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/etnaviv/
etnaviv_compiler_nir_emit.c 73 OPC(seq, SET, 0_1_X, EQ), OPC(sne, SET, 0_1_X, NE), OPC(sge, SET, 0_1_X, GE), OPC(slt, SET, 0_1_X, LT),
181 /* set the "true" value for CMP instructions */
etnaviv_disasm.c 479 OPC(SET),
  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/
nv50_ir_from_tgsi.cpp 28 #include <set>
745 NV50_IR_OPCODE_CASE(SLT, SET);
746 NV50_IR_OPCODE_CASE(SGE, SET);
764 NV50_IR_OPCODE_CASE(SEQ, SET);
765 NV50_IR_OPCODE_CASE(SGT, SET);
767 NV50_IR_OPCODE_CASE(SLE, SET);
768 NV50_IR_OPCODE_CASE(SNE, SET);
807 NV50_IR_OPCODE_CASE(FSEQ, SET);
808 NV50_IR_OPCODE_CASE(FSGE, SET);
809 NV50_IR_OPCODE_CASE(FSLT, SET);
    [all...]
  /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/
nv50_ir_from_tgsi.cpp 28 #include <set>
805 NV50_IR_OPCODE_CASE(SLT, SET);
806 NV50_IR_OPCODE_CASE(SGE, SET);
823 NV50_IR_OPCODE_CASE(SEQ, SET);
824 NV50_IR_OPCODE_CASE(SGT, SET);
826 NV50_IR_OPCODE_CASE(SLE, SET);
827 NV50_IR_OPCODE_CASE(SNE, SET);
866 NV50_IR_OPCODE_CASE(FSEQ, SET);
867 NV50_IR_OPCODE_CASE(FSGE, SET);
868 NV50_IR_OPCODE_CASE(FSLT, SET);
    [all...]
  /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/etnaviv/
etnaviv_disasm.c 479 OPC(SET),
  /xsrc/external/mit/xf86-video-geode/dist/src/panel/
drac9210.c 488 Set CS LOW
500 Set DATA HIGH
515 Set Data LOW
544 SET CLOCK in ax, dx mov ah, c92DataReg or ah, CLOCK9210 mov c92DataReg, ah out dx, ax out 0ED h, al /* IOPAUSE */
  /xsrc/external/mit/xf86-video-nsc/dist/src/panel/
drac9210.c 615 ;Set CS LOW
637 ;Set DATA HIGH
659 ;Set Data LOW
712 ;SET CLOCK
  /xsrc/external/mit/fontconfig/dist/fc-lang/
fclang.h 30 #define SET(n) (n * sizeof (FcLangCharSet) + offsetof (FcLangCharSet, charset))
31 #define OFF(s,o) (OFF0 + o * sizeof (uintptr_t) - SET(s))
32 #define NUM(s,n) (NUM0 + n * sizeof (FcChar16) - SET(s))

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