Searched refs:SF (Results 1 - 15 of 15) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/intel/isl/
H A Disl_format.c57 #define SF(sampl, filt, shad, ck, rt, ab, vb, so, color, tw, tr, ccs_e, sf) \ macro
103 SF( Y, 50, x, x, Y, Y, Y, Y, x, 70, 90, 90, R32G32B32A32_FLOAT)
104 SF( Y, x, x, x, Y, x, Y, Y, x, 70, 90, 90, R32G32B32A32_SINT)
105 SF( Y, x, x, x, Y, x, Y, Y, x, 70, 90, 90, R32G32B32A32_UINT)
106 SF( x, x, x, x, x, x, Y, x, x, x, x, x, R32G32B32A32_UNORM)
107 SF( x, x, x, x, x, x, Y, x, x, x, x, x, R32G32B32A32_SNORM)
108 SF( x, x, x, x, x, x, Y, x, x, x, x, x, R64G64_FLOAT)
109 SF( Y, 50, x, x, 100, 100, x, x, x, x, x, 100, R32G32B32X32_FLOAT)
110 SF( x, x, x, x, x, x, Y, x, x, x, x, x, R32G32B32A32_SSCALED)
111 SF(
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/xsrc/external/mit/MesaLib.old/dist/src/intel/isl/
H A Disl_format.c57 #define SF(sampl, filt, shad, ck, rt, ab, vb, so, color, tw, tr, ccs_e, sf) \ macro
101 SF( Y, 50, x, x, Y, Y, Y, Y, x, 70, 90, 90, R32G32B32A32_FLOAT)
102 SF( Y, x, x, x, Y, x, Y, Y, x, 70, 90, 90, R32G32B32A32_SINT)
103 SF( Y, x, x, x, Y, x, Y, Y, x, 70, 90, 90, R32G32B32A32_UINT)
104 SF( x, x, x, x, x, x, Y, x, x, x, x, x, R32G32B32A32_UNORM)
105 SF( x, x, x, x, x, x, Y, x, x, x, x, x, R32G32B32A32_SNORM)
106 SF( x, x, x, x, x, x, Y, x, x, x, x, x, R64G64_FLOAT)
107 SF( Y, 50, x, x, 100, 100, x, x, x, x, x, 100, R32G32B32X32_FLOAT)
108 SF( x, x, x, x, x, x, Y, x, x, x, x, x, R32G32B32A32_SSCALED)
109 SF(
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/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dbrw_urb.c42 #define SF 3 macro
60 * The SF unit preallocates a PUE at the start of thread dispatch, and only
63 * For CLIP, the SF unit will hold the previous primitive while the
84 * XXX: Verify SF min_entry_size.
127 if (sfsize < limits[SF].min_entry_size)
128 sfsize = limits[SF].min_entry_size;
145 brw->urb.nr_sf_entries = limits[SF].preferred_nr_entries;
158 brw->urb.nr_sf_entries = limits[SF].preferred_nr_entries;
174 brw->urb.nr_sf_entries = limits[SF].min_nr_entries;
199 "URB fence: %d ..VS.. %d ..GS.. %d ..CLP.. %d ..SF
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/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/
H A Dbrw_urb.c42 #define SF 3 macro
60 * The SF unit preallocates a PUE at the start of thread dispatch, and only
63 * For CLIP, the SF unit will hold the previous primitive while the
84 * XXX: Verify SF min_entry_size.
127 if (sfsize < limits[SF].min_entry_size)
128 sfsize = limits[SF].min_entry_size;
145 brw->urb.nr_sf_entries = limits[SF].preferred_nr_entries;
158 brw->urb.nr_sf_entries = limits[SF].preferred_nr_entries;
174 brw->urb.nr_sf_entries = limits[SF].min_nr_entries;
199 "URB fence: %d ..VS.. %d ..GS.. %d ..CLP.. %d ..SF
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/xsrc/external/mit/xf86-video-nouveau/dist/src/
H A Dnv40_exa.c105 #define SF(bf) (NV30_3D_BLEND_FUNC_SRC_RGB_##bf | \ macro
111 /* Clear */ { 0, 0, SF( ZERO), DF( ZERO) },
112 /* Src */ { 0, 0, SF( ONE), DF( ZERO) },
113 /* Dst */ { 0, 0, SF( ZERO), DF( ONE) },
114 /* Over */ { 1, 0, SF( ONE), DF(ONE_MINUS_SRC_ALPHA) },
115 /* OverReverse */ { 0, 1, SF(ONE_MINUS_DST_ALPHA), DF( ONE) },
116 /* In */ { 0, 1, SF( DST_ALPHA), DF( ZERO) },
117 /* InReverse */ { 1, 0, SF( ZERO), DF( SRC_ALPHA) },
118 /* Out */ { 0, 1, SF(ONE_MINUS_DST_ALPHA), DF( ZERO) },
119 /* OutReverse */ { 1, 0, SF( ZER
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H A Dnv10_exa.c102 #define SF(x) NV10_3D_BLEND_FUNC_SRC_##x macro
110 { SF(ZERO), DF(ZERO) }, /* Clear */
111 { SF(ONE), DF(ZERO) }, /* Src */
112 { SF(ZERO), DF(ONE) }, /* Dst */
113 { SF(ONE), DF(ONE_MINUS_SRC_ALPHA) }, /* Over */
114 { SF(ONE_MINUS_DST_ALPHA), DF(ONE) }, /* OverReverse */
115 { SF(DST_ALPHA), DF(ZERO) }, /* In */
116 { SF(ZERO), DF(SRC_ALPHA) }, /* InReverse */
117 { SF(ONE_MINUS_DST_ALPHA), DF(ZERO) }, /* Out */
118 { SF(ZER
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/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D7.4.3.rst34 point (SF bug 2793846)
H A D9.0.3.rst186 - i965: Refactor Gen6+ SF attribute override code.
187 - i965: Compute the maximum SF source attribute.
188 - i965: Fix the SF Vertex URB Read Length calculation for Sandybridge.
189 - i965: Fix the SF Vertex URB Read Length calculation for Gen7
H A D13.0.6.rst189 - i965: Combine the Gen6 SF and Clip viewport atoms.
H A D7.10.rst1181 - i965: Enable attribute swizzling (repositioning) in the gen6 SF.
1258 - i965: Update gen6 SF state when point state (sprite or attenuation)
1333 - i965: Update gen6 SF state on fragment program change too.
H A D19.1.0.rst2549 - iris: RASTER + SF + some CLIP, fix DIRTY vs. NEW
2646 - iris: more SF CL VPs
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/nv50/
H A Dnv50_formats.c71 #define SF(c, pf, sf, r, g, b, a, t0, t1, t2, t3, sz, u) \ macro
87 SF(c, p, G80_SURFACE_FORMAT_##n, r, g, b, a, t, t, t, t, s, u)
90 SF(c, p, G80_ZETA_FORMAT_##n, \
93 SF(c, p, G80_ZETA_FORMAT_##n, \
96 SF(c, p, G80_ZETA_FORMAT_##n, \
99 SF(c, p, G80_ZETA_FORMAT_NONE, \
365 SF(A, R8SG8SB8UX8U_NORM, 0, R, G, B, ONE_FLOAT, SNORM, SNORM, UNORM, UNORM, A8B8G8R8, T),
366 SF(A, R5SG5SB6U_NORM, 0, R, G, B, ONE_FLOAT, SNORM, SNORM, UNORM, UNORM, B6G5R5, T),
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/nv50/
H A Dnv50_formats.c71 #define SF(c, pf, sf, r, g, b, a, t0, t1, t2, t3, sz, u) \ macro
87 SF(c, p, G80_SURFACE_FORMAT_##n, r, g, b, a, t, t, t, t, s, u)
90 SF(c, p, G80_ZETA_FORMAT_##n, \
93 SF(c, p, G80_ZETA_FORMAT_##n, \
96 SF(c, p, G80_ZETA_FORMAT_##n, \
99 SF(c, p, G80_ZETA_FORMAT_NONE, \
365 SF(A, R8SG8SB8UX8U_NORM, 0, R, G, B, ONE_FLOAT, SNORM, SNORM, UNORM, UNORM, A8B8G8R8, T),
366 SF(A, R5SG5SB6U_NORM, 0, R, G, B, ONE_FLOAT, SNORM, SNORM, UNORM, UNORM, B6G5R5, T),
/xsrc/external/mit/MesaLib/dist/docs/
H A Denvvars.rst309 the SF program)
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_sdvo.c963 uint8_t SF:3; member in struct:dip_infoframe::__anond99ada54010a::__anond99ada540308

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