Searched refs:SI (Results 1 - 25 of 76) sorted by relevance

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/xsrc/external/mit/xorgproto/dist/specs/SIAddresses/
H A Dlocaluser.md18 xhost +SI:localuser:alanc
22 xhost +SI:localuser:#1234
26 xhost +SI:localgroup:wheel
30 xhost +SI:localgroup:#0
/xsrc/external/mit/MesaLib.old/dist/src/amd/common/
H A Damd_family.h113 SI, /* GFX6 */ enumerator in enum:chip_class
H A Dac_shader_util.c170 /* SI (except OLAND and HAINAN) has a bug that it only looks
172 if (ctx->chip_class == SI &&
/xsrc/external/mit/xorg-server.old/dist/hw/xfree86/x86emu/x86emu/
H A Dregs.h106 i386_general_register SP, BP, SI, DI, IP; member in struct:i386_special_regs
144 #define R_SI spc.SI.I16_reg.x_reg
152 #define R_SI spc.SI.I16_reg.x_reg
160 #define R_ESI spc.SI.I32_reg.e_reg
/xsrc/external/mit/xorg-server/dist/hw/xfree86/x86emu/x86emu/
H A Dregs.h108 i386_general_register SP, BP, SI, DI, IP; member in struct:i386_special_regs
155 #define R_SI spc.SI.I16_reg.x_reg
163 #define R_ESI spc.SI.I32_reg.e_reg
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D17.1.7.rst31 - AMD SI cards: Some vulkan apps freeze the system
74 - radv: fix f16->f32 denorm handling for SI/CIK. (v2)
75 - radv: fix MSAA on SI gpus.
H A D17.1.3.rst40 - radv: Remove SI num RB override for occlusion queries.
96 - radeonsi: disable the patch ID workaround on SI when the patch ID
H A D17.1.6.rst73 - radv: fix buffer views on SI/CIK.
74 - radv/ac: realign SI workaround with radeonsi.
75 - radv/ac: port SI TC L1 write corruption fix.
165 - radeonsi: fix detection of DRAW_INDIRECT_MULTI on SI
H A D9.2.2.rst76 - radeonsi: Use 'SI' as the LLVM processor for CIK on LLVM <= 3.3
H A D13.0.3.rst108 - radeonsi: apply a TC L1 write corruption workaround for SI
109 - radeonsi: apply a tessellation bug workaround for SI
H A D12.0.5.rst85 - radeonsi: emit TA_CS_BC_BASE_ADDR on SI only if the kernel allows it
H A D18.0.2.rst41 - SI reaches the maximum IB size in dwords and fail to submit
H A D18.2.1.rst147 - radeonsi: fix HTILE for NPOT textures with mipmapping on SI/CI
149 on SI/CI
H A D17.3.0.rst55 - AMD SI cards: Some vulkan apps freeze the system
124 - [regression, SI] GPU crash in Unigine Valley
137 - [regression, SI] Performance decrease in Unigine Valley & Heaven
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
H A Dsi_dma_cs.c45 if (sctx->chip_class == SI) {
46 unreachable("SI DMA doesn't support the timestamp packet.");
90 if (sctx->chip_class == SI) {
H A Dsi_test_dma_perf.c115 if (sctx->chip_class == SI) {
116 /* SI doesn't support CP DMA operations through L2. */
119 /* WAVES_PER_SH is in multiples of 16 on SI. */
154 if (sctx->chip_class == SI)
/xsrc/external/mit/MesaLib.old/dist/src/gallium/winsys/radeon/drm/
H A Dradeon_drm_winsys.c272 ws->info.chip_class = SI;
553 if (ws->info.chip_class >= SI) {
556 fprintf(stderr, "radeon: Kernel 3.10 is required for SI support.\n");
564 ws->info.gfx_ib_pad_with_type2 = ws->info.chip_class <= SI ||
583 (ws->info.chip_class == SI &&
585 /* SI doesn't support unaligned loads. */
590 ws->info.has_2d_tiling = ws->info.chip_class <= SI || ws->info.drm_minor >= 35;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/sb/
H A Dsb_ir.cpp319 vvec::iterator SI(src.begin()), DI(dst.begin()); local in function:r600_sb::alu_packed_node::update_packed_items
357 I2 != E2; ++I2, ++SI) {
358 *I2 = *SI;
H A Dsb_ra_init.cpp681 for (vvec::iterator SI = sv.begin(), DI = dv.begin(), SE = sv.end(); local in function:r600_sb::ra_split::split_packed_ins
682 SI != SE; ++SI, ++DI) {
683 n->insert_before(sh.create_copy_mov(*DI, *SI));
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sb/
H A Dsb_ir.cpp319 vvec::iterator SI(src.begin()), DI(dst.begin()); local in function:r600_sb::alu_packed_node::update_packed_items
357 I2 != E2; ++I2, ++SI) {
358 *I2 = *SI;
H A Dsb_ra_init.cpp686 for (vvec::iterator SI = sv.begin(), DI = dv.begin(), SE = sv.end(); local in function:r600_sb::ra_split::split_packed_ins
687 SI != SE; ++SI, ++DI) {
688 n->insert_before(sh.create_copy_mov(*DI, *SI));
/xsrc/external/mit/MesaLib/dist/docs/
H A Dthanks.rst33 superseded by SGI SI GLU).
H A Dfaq.rst94 (SI) <http://web.archive.org/web/20171010115110_/http://oss.sgi.com/projects/ogl-sample/index.html>`__
95 is available. The SI was written during the time that OpenGL was
96 originally designed. Unfortunately, development of the SI has stagnated.
/xsrc/external/mit/MesaLib.old/dist/src/amd/addrlib/src/
H A Damdgpu_asic_addr.h50 #define FAMILY_IS_SI(f) FAMILY_IS(f, SI)
/xsrc/external/mit/MesaLib/dist/src/amd/addrlib/src/
H A Damdgpu_asic_addr.h53 #define FAMILY_IS_SI(f) FAMILY_IS(f, SI)

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