Searched refs:SetIndexReg (Results 1 - 5 of 5) sorted by relevance

/xsrc/external/mit/xf86-video-ast/dist/src/
H A Dast_cursor.c201 SetIndexReg(CRTC_PORT, 0xC2, (UCHAR) (x_offset));
202 SetIndexReg(CRTC_PORT, 0xC3, (UCHAR) (y_offset));
203 SetIndexReg(CRTC_PORT, 0xC4, (UCHAR) (x & 0xFF));
204 SetIndexReg(CRTC_PORT, 0xC5, (UCHAR) ((x >> 8) & 0x0F));
205 SetIndexReg(CRTC_PORT, 0xC6, (UCHAR) (y & 0xFF));
206 SetIndexReg(CRTC_PORT, 0xC7, (UCHAR) ((y >> 8) & 0x07));
307 SetIndexReg(CRTC_PORT, 0xC8, (UCHAR) (ulPatternAddr & 0xFF));
308 SetIndexReg(CRTC_PORT, 0xC9, (UCHAR) ((ulPatternAddr >> 8) & 0xFF));
309 SetIndexReg(CRTC_PORT, 0xCA, (UCHAR) ((ulPatternAddr >> 16) & 0xFF));
419 SetIndexReg(CRTC_POR
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H A Dast_mode.c691 SetIndexReg(CRTC_PORT, 0x8C, (UCHAR) ((ulColorIndex & 0x0F) << 4));
692 SetIndexReg(CRTC_PORT, 0x8D, (UCHAR) (ulRefreshRateIndex & 0xFF));
693 SetIndexReg(CRTC_PORT, 0x8E, (UCHAR) (ulModeID & 0xFF));
696 SetIndexReg(CRTC_PORT, 0x91, 0x00); /* clear signature */
699 SetIndexReg(CRTC_PORT, 0x91, 0xA8); /* signature */
700 SetIndexReg(CRTC_PORT, 0x92, (UCHAR) (pScrn->bitsPerPixel) );
701 SetIndexReg(CRTC_PORT, 0x93, (UCHAR) (mode->Clock / 1000) );
702 SetIndexReg(CRTC_PORT, 0x94, (UCHAR) (mode->CrtcHDisplay) );
703 SetIndexReg(CRTC_PORT, 0x95, (UCHAR) (mode->CrtcHDisplay >> 8) ); /* color depth */
704 SetIndexReg(CRTC_POR
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H A Dast_vgatool.h61 #define SetIndexReg(base,index, val) { \ macro
73 SetIndexReg(base,index,__Temp); \
H A Dast_driver.c1469 SetIndexReg(SEQ_PORT, (UCHAR) (i), astReg->SEQ[i]);
1474 SetIndexReg(CRTC_PORT, (UCHAR) (i), astReg->CRTC[i]);
1478 SetIndexReg(GR_PORT, (UCHAR) (i), astReg->GR[i]);
1514 SetIndexReg(CRTC_PORT, (UCHAR) (i), astReg->ExtCRTC[icount++]);
1516 SetIndexReg(CRTC_PORT, (UCHAR) (i), astReg->ExtCRTC[icount++]);
1517 SetIndexReg(CRTC_PORT, (UCHAR) (0xBB), astReg->ExtCRTC[icount]);
H A Dast_vgatool.c320 SetIndexReg(CRTC_PORT, 0x99, jReg);
404 SetIndexReg(CRTC_PORT,0x80, 0xA8);
758 SetIndexReg(CRTC_PORT,0x0D, (UCHAR) (addr & 0xFF));
759 SetIndexReg(CRTC_PORT,0x0C, (UCHAR) ((addr >> 8) & 0xFF));
760 SetIndexReg(CRTC_PORT,0xAF, (UCHAR) ((addr >> 16) & 0xFF));
1132 SetIndexReg(CRTC_PORT, i, 0x00);

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