| /xsrc/external/mit/MesaLib.old/dist/src/mesa/state_tracker/tests/ |
| H A D | test_glsl_to_tgsi_array_merge.cpp | 53 EXPECT_EQ(a1.access_mask(), WRITEMASK_X);
65 EXPECT_EQ(a2.access_mask(), WRITEMASK_X);
85 EXPECT_EQ(a1.access_mask(), WRITEMASK_X);
97 EXPECT_EQ(a2.access_mask(), WRITEMASK_X);
119 EXPECT_EQ(a1.access_mask(), WRITEMASK_XYZW);
150 EXPECT_EQ(a1.access_mask(), WRITEMASK_XYZW);
182 EXPECT_EQ(a1.access_mask(), WRITEMASK_XY);
224 EXPECT_EQ(a2.access_mask(), WRITEMASK_XY);
241 EXPECT_EQ(a1.access_mask(), WRITEMASK_XY);
271 EXPECT_EQ(a1.access_mask(), WRITEMASK_
[all...] |
| H A D | st_tests_common.cpp | 559 EXPECT_EQ(lifetimes[i].access_mask(), e[i].access_mask());
580 EXPECT_EQ(lifetimes[i].access_mask()| e[i].access_mask(),
581 e[i].access_mask());
|
| /xsrc/external/mit/MesaLib/dist/src/mesa/state_tracker/tests/ |
| H A D | test_glsl_to_tgsi_array_merge.cpp | 53 EXPECT_EQ(a1.access_mask(), WRITEMASK_X);
65 EXPECT_EQ(a2.access_mask(), WRITEMASK_X);
85 EXPECT_EQ(a1.access_mask(), WRITEMASK_X);
97 EXPECT_EQ(a2.access_mask(), WRITEMASK_X);
119 EXPECT_EQ(a1.access_mask(), WRITEMASK_XYZW);
150 EXPECT_EQ(a1.access_mask(), WRITEMASK_XYZW);
182 EXPECT_EQ(a1.access_mask(), WRITEMASK_XY);
224 EXPECT_EQ(a2.access_mask(), WRITEMASK_XY);
241 EXPECT_EQ(a1.access_mask(), WRITEMASK_XY);
271 EXPECT_EQ(a1.access_mask(), WRITEMASK_
[all...] |
| H A D | st_tests_common.cpp | 559 EXPECT_EQ(lifetimes[i].access_mask(), e[i].access_mask());
580 EXPECT_EQ(lifetimes[i].access_mask()| e[i].access_mask(),
581 e[i].access_mask());
|
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/state_tracker/ |
| H A D | st_glsl_to_tgsi_array_merge.h | 66 int access_mask() const { return component_access_mask;} function in class:array_live_range
|
| H A D | st_glsl_to_tgsi_array_merge.cpp | 232 int trgt_access_mask = other->access_mask();
503 if (range_1.access_mask() == range_2.access_mask()) {
|
| H A D | st_glsl_to_tgsi_temprename.cpp | 239 int access_mask; member in class:__anone335a9c70110::temp_access
493 access_mask(0),
500 if (access_mask && access_mask != mask)
502 access_mask |= mask;
625 unsigned mask = access_mask;
|
| /xsrc/external/mit/MesaLib/dist/src/mesa/state_tracker/ |
| H A D | st_glsl_to_tgsi_array_merge.h | 66 int access_mask() const { return component_access_mask;} function in class:array_live_range
|
| H A D | st_glsl_to_tgsi_array_merge.cpp | 232 int trgt_access_mask = other->access_mask();
503 if (range_1.access_mask() == range_2.access_mask()) {
|
| H A D | st_glsl_to_tgsi_temprename.cpp | 239 int access_mask; member in class:__anond2bc787a0110::temp_access
493 access_mask(0),
500 if (access_mask && access_mask != mask)
502 access_mask |= mask;
625 unsigned mask = access_mask;
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sfn/ |
| H A D | sfn_liverange.h | 203 int access_mask; member in class:r600::temp_access
239 int access_mask() const { return component_access_mask;} function in class:r600::array_live_range
|
| H A D | sfn_liverange.cpp | 286 access_mask(0),
294 if (access_mask && access_mask != mask)
296 access_mask |= mask;
344 unsigned mask = access_mask;
|
| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| H A D | brw_eu_validate.c | 970 uint64_t access_mask = 0; local in function:general_restrictions_on_region_parameters
974 access_mask |= mask << offset;
980 if ((uint32_t)access_mask != 0 && (access_mask >> 32) != 0) {
1214 * Creates an \p access_mask for an \p exec_size, \p element_size, and a region
1216 * An \p access_mask is a 32-element array of uint64_t, where each uint64_t is
1222 * access_mask[0] = 0x00000000000000F0
1223 * access_mask[1] = 0x000000000000F000
1224 * access_mask[2] = 0x0000000000F00000
1225 * access_mask[
1232 align1_access_mask(uint64_t access_mask[static32],unsigned exec_size,unsigned element_size,unsigned subreg,unsigned vstride,unsigned width,unsigned hstride) argument
1258 registers_read(const uint64_t access_mask[static32]) argument
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| H A D | brw_eu_validate.c | 1057 uint64_t access_mask = 0; local in function:general_restrictions_on_region_parameters
1061 access_mask |= mask << (offset % 64);
1067 if ((uint32_t)access_mask != 0 && (access_mask >> 32) != 0) {
1301 * Creates an \p access_mask for an \p exec_size, \p element_size, and a region
1303 * An \p access_mask is a 32-element array of uint64_t, where each uint64_t is
1309 * access_mask[0] = 0x00000000000000F0
1310 * access_mask[1] = 0x000000000000F000
1311 * access_mask[2] = 0x0000000000F00000
1312 * access_mask[
1319 align1_access_mask(uint64_t access_mask[static32],unsigned exec_size,unsigned element_size,unsigned subreg,unsigned vstride,unsigned width,unsigned hstride) argument
1345 registers_read(const uint64_t access_mask[static32]) argument
[all...] |