Searched refs:affinity (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/panfrost/bifrost/
H A Dbi_ra.c33 uint64_t *affinity; member in struct:lcra_state
68 l->affinity = calloc(sizeof(l->affinity[0]), node_count);
79 free(l->affinity);
135 if (l->affinity[step] == 0) continue;
139 u_foreach_bit64(r, l->affinity[step]) {
173 /* Construct an affinity mask such that the vector with `count` elements does
182 * EVEN_BITS_MASK is an affinity mask for aligned register pairs. Interpreted
228 * preloaded register. The affinity is the intersection
229 * of affinity mask
235 uint64_t affinity = bi_make_affinity(preload_live, count, split_file); local in function:bi_mark_interference
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/xsrc/external/mit/MesaLib/dist/src/amd/compiler/
H A Daco_register_allocation.cpp52 uint32_t affinity = 0; member in struct:aco::__anon1a58e4b40110::assignment
1531 if (ctx.assignments[def.tempId()].affinity) {
1532 assignment& affinity = ctx.assignments[ctx.assignments[def.tempId()].affinity]; local in function:aco::__anon1a58e4b40110::get_reg
1533 if (affinity.assigned) {
1534 PhysReg reg = affinity.reg;
1544 if (ctx.assignments[temp.id()].affinity) {
1545 assignment& affinity = ctx.assignments[ctx.assignments[temp.id()].affinity]; local in function:aco::__anon1a58e4b40110::get_reg
1546 if (affinity
1954 assignment& affinity = ctx.assignments[ctx.assignments[definition.tempId()].affinity]; local in function:aco::__anon1a58e4b40110::get_regs_for_phis
2553 assignment& affinity = ctx.assignments[ctx.assignments[def_id].affinity]; local in function:aco::register_allocation
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/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/swr/rasterizer/core/core/
H A Dthreads.cpp325 GROUP_AFFINITY affinity = {}; local in function:bindThread
326 affinity.Group = procGroupId;
338 affinity.Mask = 0;
347 affinity.Mask = KAFFINITY(1) << threadId;
351 affinity.Mask = KAFFINITY(0);
355 if (!SetThreadGroupAffinity(GetCurrentThread(), &affinity, nullptr))
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D21.0.2.rst63 - util: rework AMD cpu L3 cache affinity code.
H A D21.1.0.rst1392 - aco/ra: split affinity creation into separate function
1603 - util: rework AMD cpu L3 cache affinity code.
4710 - aco: add affinity for non-sequential MIMG operands
H A D21.2.0.rst1561 - aco/ra: refactor affinity coalescing
2731 - util: Consider CPU affinity when detecting number of CPUs

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