| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/zink/ |
| zink_batch.c | 29 zink_reset_batch_state(struct zink_context *ctx, struct zink_batch_state *bs)
33 if (VKSCR(ResetCommandPool)(screen->dev, bs->cmdpool, 0) != VK_SUCCESS)
37 set_foreach_remove(bs->resources, entry) {
39 if (!zink_resource_object_usage_unset(obj, bs)) {
44 util_dynarray_append(&bs->unref_resources, struct zink_resource_object*, obj);
48 while (util_dynarray_contains(&bs->bindless_releases[i], uint32_t)) {
49 uint32_t handle = util_dynarray_pop(&bs->bindless_releases[i], uint32_t);
56 set_foreach_remove(bs->active_queries, entry) {
58 zink_prune_query(screen, bs, query);
61 set_foreach_remove(bs->surfaces, entry)
134 const struct zink_batch_state *bs = ctx->batch_states; local
146 struct zink_batch_state *bs = ctx->batch_states; local
193 struct zink_batch_state *bs = rzalloc(NULL, struct zink_batch_state); local
266 struct zink_batch_state *bs = NULL; local
335 struct zink_batch_state *bs = data; local
350 struct zink_batch_state *bs = data; local
583 struct zink_batch_state *bs; local
[all...] |
| zink_batch.h | 127 zink_reset_batch_state(struct zink_context *ctx, struct zink_batch_state *bs);
130 zink_clear_batch_state(struct zink_context *ctx, struct zink_batch_state *bs);
136 zink_batch_state_destroy(struct zink_screen *screen, struct zink_batch_state *bs);
139 zink_batch_state_clear_resources(struct zink_screen *screen, struct zink_batch_state *bs);
189 zink_batch_usage_unset(struct zink_batch_usage **u, struct zink_batch_state *bs)
191 (void)p_atomic_cmpxchg((uintptr_t *)u, (uintptr_t)&bs->usage, (uintptr_t)NULL);
195 zink_batch_usage_set(struct zink_batch_usage **u, struct zink_batch_state *bs)
197 *u = &bs->usage;
201 zink_batch_usage_matches(const struct zink_batch_usage *u, const struct zink_batch_state *bs)
203 return u == &bs->usage
[all...] |
| zink_bo.h | 219 zink_bo_usage_matches(const struct zink_bo *bo, const struct zink_batch_state *bs)
221 return zink_batch_usage_matches(bo->reads, bs) ||
222 zink_batch_usage_matches(bo->writes, bs);
245 zink_bo_usage_set(struct zink_bo *bo, struct zink_batch_state *bs, bool write)
248 zink_batch_usage_set(&bo->writes, bs);
250 zink_batch_usage_set(&bo->reads, bs);
254 zink_bo_usage_unset(struct zink_bo *bo, struct zink_batch_state *bs)
256 zink_batch_usage_unset(&bo->reads, bs);
257 zink_batch_usage_unset(&bo->writes, bs);
|
| zink_query.h | 46 zink_prune_query(struct zink_screen *screen, struct zink_batch_state *bs, struct zink_query *query);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/vl/ |
| vl_mpeg12_bitstream.h | 46 vl_mpg12_bs_init(struct vl_mpg12_bs *bs, struct pipe_video_codec *decoder);
49 vl_mpg12_bs_decode(struct vl_mpg12_bs *bs,
|
| vl_mpeg12_bitstream.c | 621 motion_vector(struct vl_mpg12_bs *bs, int r, int s, int dmv, short delta[2], short dmvector[2])
626 int r_size = bs->desc->f_code[s][t];
628 vl_vlc_fillbits(&bs->vlc);
629 motion_code = vl_vlc_get_vlclbf(&bs->vlc, tbl_B10, 11);
633 int residual = vl_vlc_get_uimsbf(&bs->vlc, r_size) + 1;
640 dmvector[t] = vl_vlc_get_vlclbf(&bs->vlc, tbl_B11, 2);
656 motion_vector_frame(struct vl_mpg12_bs *bs, int s, struct pipe_mpeg12_macroblock *mb)
662 mb->motion_vertical_field_select |= vl_vlc_get_uimsbf(&bs->vlc, 1) << s;
663 motion_vector(bs, 0, s, dmv, delta, dmvector);
664 mb->PMV[0][s][0] = wrap(mb->PMV[0][s][0] + delta[0], bs->desc->f_code[s][0])
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/vl/ |
| vl_mpeg12_bitstream.h | 46 vl_mpg12_bs_init(struct vl_mpg12_bs *bs, struct pipe_video_codec *decoder);
49 vl_mpg12_bs_decode(struct vl_mpg12_bs *bs,
|
| vl_mpeg12_bitstream.c | 621 motion_vector(struct vl_mpg12_bs *bs, int r, int s, int dmv, short delta[2], short dmvector[2])
626 int r_size = bs->desc->f_code[s][t];
628 vl_vlc_fillbits(&bs->vlc);
629 motion_code = vl_vlc_get_vlclbf(&bs->vlc, tbl_B10, 11);
633 int residual = vl_vlc_get_uimsbf(&bs->vlc, r_size) + 1;
640 dmvector[t] = vl_vlc_get_vlclbf(&bs->vlc, tbl_B11, 2);
656 motion_vector_frame(struct vl_mpg12_bs *bs, int s, struct pipe_mpeg12_macroblock *mb)
662 mb->motion_vertical_field_select |= vl_vlc_get_uimsbf(&bs->vlc, 1) << s;
663 motion_vector(bs, 0, s, dmv, delta, dmvector);
664 mb->PMV[0][s][0] = wrap(mb->PMV[0][s][0] + delta[0], bs->desc->f_code[s][0])
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a2xx/ |
| fd2_zsa.c | 72 const struct pipe_stencil_state *bs = &cso->stencil[1]; local
76 A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF(bs->func) | /* maps 1:1 */
77 A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF(fd_stencil_op(bs->fail_op)) |
78 A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF(fd_stencil_op(bs->zpass_op)) |
79 A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF(fd_stencil_op(bs->zfail_op));
82 A2XX_RB_STENCILREFMASK_STENCILWRITEMASK(bs->writemask) |
83 A2XX_RB_STENCILREFMASK_STENCILMASK(bs->valuemask);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a3xx/ |
| fd3_zsa.c | 73 const struct pipe_stencil_state *bs = &cso->stencil[1]; local
77 A3XX_RB_STENCIL_CONTROL_FUNC_BF(bs->func) | /* maps 1:1 */
78 A3XX_RB_STENCIL_CONTROL_FAIL_BF(fd_stencil_op(bs->fail_op)) |
79 A3XX_RB_STENCIL_CONTROL_ZPASS_BF(fd_stencil_op(bs->zpass_op)) |
80 A3XX_RB_STENCIL_CONTROL_ZFAIL_BF(fd_stencil_op(bs->zfail_op));
83 A3XX_RB_STENCILREFMASK_STENCILWRITEMASK(bs->writemask) |
84 A3XX_RB_STENCILREFMASK_STENCILMASK(bs->valuemask);
|
| fd3_program.h | 40 struct ir3_shader_variant *bs; /* VS for when emit->binning */ member in struct:fd3_program_state
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a4xx/ |
| fd4_zsa.c | 74 const struct pipe_stencil_state *bs = &cso->stencil[1]; local
78 A4XX_RB_STENCIL_CONTROL_FUNC_BF(bs->func) | /* maps 1:1 */
79 A4XX_RB_STENCIL_CONTROL_FAIL_BF(fd_stencil_op(bs->fail_op)) |
80 A4XX_RB_STENCIL_CONTROL_ZPASS_BF(fd_stencil_op(bs->zpass_op)) |
81 A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(fd_stencil_op(bs->zfail_op));
84 A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(bs->writemask) |
85 A4XX_RB_STENCILREFMASK_BF_STENCILMASK(bs->valuemask);
|
| fd4_program.h | 40 struct ir3_shader_variant *bs; /* VS for when emit->binning */ member in struct:fd4_program_state
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/freedreno/a2xx/ |
| fd2_zsa.c | 72 const struct pipe_stencil_state *bs = &cso->stencil[1]; local
76 A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF(bs->func) | /* maps 1:1 */
77 A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF(fd_stencil_op(bs->fail_op)) |
78 A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF(fd_stencil_op(bs->zpass_op)) |
79 A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF(fd_stencil_op(bs->zfail_op));
82 A2XX_RB_STENCILREFMASK_STENCILWRITEMASK(bs->writemask) |
83 A2XX_RB_STENCILREFMASK_STENCILMASK(bs->valuemask);
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/freedreno/a3xx/ |
| fd3_zsa.c | 75 const struct pipe_stencil_state *bs = &cso->stencil[1]; local
79 A3XX_RB_STENCIL_CONTROL_FUNC_BF(bs->func) | /* maps 1:1 */
80 A3XX_RB_STENCIL_CONTROL_FAIL_BF(fd_stencil_op(bs->fail_op)) |
81 A3XX_RB_STENCIL_CONTROL_ZPASS_BF(fd_stencil_op(bs->zpass_op)) |
82 A3XX_RB_STENCIL_CONTROL_ZFAIL_BF(fd_stencil_op(bs->zfail_op));
85 A3XX_RB_STENCILREFMASK_STENCILWRITEMASK(bs->writemask) |
86 A3XX_RB_STENCILREFMASK_STENCILMASK(bs->valuemask);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a5xx/ |
| fd5_zsa.c | 93 const struct pipe_stencil_state *bs = &cso->stencil[1]; local
97 A5XX_RB_STENCIL_CONTROL_FUNC_BF(bs->func) | /* maps 1:1 */
98 A5XX_RB_STENCIL_CONTROL_FAIL_BF(fd_stencil_op(bs->fail_op)) |
99 A5XX_RB_STENCIL_CONTROL_ZPASS_BF(fd_stencil_op(bs->zpass_op)) |
100 A5XX_RB_STENCIL_CONTROL_ZFAIL_BF(fd_stencil_op(bs->zfail_op));
102 A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(bs->writemask) |
103 A5XX_RB_STENCILREFMASK_BF_STENCILMASK(bs->valuemask);
|
| fd5_program.h | 40 struct ir3_shader_variant *bs; /* VS for when emit->binning */ member in struct:fd5_program_state
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/freedreno/a4xx/ |
| fd4_zsa.c | 77 const struct pipe_stencil_state *bs = &cso->stencil[1]; local
81 A4XX_RB_STENCIL_CONTROL_FUNC_BF(bs->func) | /* maps 1:1 */
82 A4XX_RB_STENCIL_CONTROL_FAIL_BF(fd_stencil_op(bs->fail_op)) |
83 A4XX_RB_STENCIL_CONTROL_ZPASS_BF(fd_stencil_op(bs->zpass_op)) |
84 A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(fd_stencil_op(bs->zfail_op));
87 A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(bs->writemask) |
88 A4XX_RB_STENCILREFMASK_BF_STENCILMASK(bs->valuemask);
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/freedreno/a5xx/ |
| fd5_zsa.c | 94 const struct pipe_stencil_state *bs = &cso->stencil[1]; local
98 A5XX_RB_STENCIL_CONTROL_FUNC_BF(bs->func) | /* maps 1:1 */
99 A5XX_RB_STENCIL_CONTROL_FAIL_BF(fd_stencil_op(bs->fail_op)) |
100 A5XX_RB_STENCIL_CONTROL_ZPASS_BF(fd_stencil_op(bs->zpass_op)) |
101 A5XX_RB_STENCIL_CONTROL_ZFAIL_BF(fd_stencil_op(bs->zfail_op));
103 A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(bs->writemask) |
104 A5XX_RB_STENCILREFMASK_BF_STENCILMASK(bs->valuemask);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a6xx/ |
| fd6_zsa.c | 172 const struct pipe_stencil_state *bs = &cso->stencil[1]; local
174 update_lrz_stencil(so, bs->func, !!bs->writemask);
178 A6XX_RB_STENCIL_CONTROL_FUNC_BF(bs->func) | /* maps 1:1 */
179 A6XX_RB_STENCIL_CONTROL_FAIL_BF(fd_stencil_op(bs->fail_op)) |
180 A6XX_RB_STENCIL_CONTROL_ZPASS_BF(fd_stencil_op(bs->zpass_op)) |
181 A6XX_RB_STENCIL_CONTROL_ZFAIL_BF(fd_stencil_op(bs->zfail_op));
183 so->rb_stencilmask |= A6XX_RB_STENCILMASK_BFMASK(bs->valuemask);
184 so->rb_stencilwrmask |= A6XX_RB_STENCILWRMASK_BFWRMASK(bs->writemask);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/llvmpipe/ |
| lp_setup_analysis.c | 111 float as, float bs,
114 float s = as * v[0][0] + bs;
130 float as, bs, at, bt; local
131 calc_interps(v0[0][0], v2[0][0], v0[1][0], v2[1][0], &as, &bs);
133 assert(test_interps(v1, as, bs, at, bt));
247 float as, bs; local
277 calc_interps(v0[0][0], v2[0][0], v0[1][0], v2[1][0], &as, &bs);
282 if (!test_interps(v, as, bs, at, bt))
291 assert(test_interps((const_float4_ptr)vA, as, bs, at, bt));
292 assert(test_interps((const_float4_ptr)vB, as, bs, at, bt))
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/frontends/clover/core/ |
| compiler.hpp | 63 link_program(const std::vector<binary> &bs, const device &dev,
69 auto spirv_linked_module = spirv::link_program(bs, dev, opts, log);
76 return llvm::link_program(bs, dev, opts, log);
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/svga/ |
| svga_pipe_blend.c | 100 struct svga_blend_state *bs)
108 bs->id = util_bitmask_add(svga->blend_object_id_bm);
111 perRT[i].blendEnable = bs->rt[i].blend_enable;
112 perRT[i].srcBlend = bs->rt[i].srcblend;
113 perRT[i].destBlend = bs->rt[i].dstblend;
114 perRT[i].blendOp = bs->rt[i].blendeq;
115 perRT[i].srcBlendAlpha = bs->rt[i].srcblend_alpha;
116 perRT[i].destBlendAlpha = bs->rt[i].dstblend_alpha;
117 perRT[i].blendOpAlpha = bs->rt[i].blendeq_alpha;
118 perRT[i].renderTargetWriteMask = bs->rt[i].writemask
373 struct svga_blend_state *bs = local
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/intel/vulkan/ |
| genX_gpu_memcpy.c | 64 unsigned bs = gcd_pow2_u64(16, size); local
67 switch (bs) {
93 .BufferPitch = bs,
112 .Component0Control = (bs >= 4) ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
113 .Component1Control = (bs >= 8) ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
114 .Component2Control = (bs >= 12) ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
115 .Component3Control = (bs >= 16) ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
176 sob.SurfacePitch = bs;
207 .ComponentMask = (1 << (bs / 4)) - 1,
217 so.Buffer0SurfacePitch = bs;
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/ |
| genX_gpu_memcpy.c | 64 unsigned bs = gcd_pow2_u64(16, size); local
67 switch (bs) {
92 .BufferPitch = bs,
108 .Component0Control = (bs >= 4) ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
109 .Component1Control = (bs >= 8) ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
110 .Component2Control = (bs >= 12) ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
111 .Component3Control = (bs >= 16) ? VFCOMP_STORE_SRC : VFCOMP_STORE_0,
160 sob.SurfacePitch = bs;
191 .ComponentMask = (1 << (bs / 4)) - 1,
201 so.Buffer0SurfacePitch = bs;
[all...] |
