Searched refs:depthstencil_rp (Results 1 - 4 of 4) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_meta_clear.c359 radv_DestroyRenderPass(radv_device_to_handle(device), state->clear[i].depthstencil_rp,
707 if (cmd_buffer->device->meta_state.clear[samples_log2].depthstencil_rp == VK_NULL_HANDLE) {
710 &cmd_buffer->device->meta_state.clear[samples_log2].depthstencil_rp);
720 cmd_buffer->device->meta_state.clear[samples_log2].depthstencil_rp);
1355 res = create_depthstencil_renderpass(device, samples, &state->clear[i].depthstencil_rp);
1362 state->clear[i].depthstencil_rp);
1368 state->clear[i].depthstencil_rp);
1374 &state->clear[i].depthstencil_pipeline[j], state->clear[i].depthstencil_rp);
1380 state->clear[i].depthstencil_rp);
1386 state->clear[i].depthstencil_rp);
[all...]
H A Dradv_private.h422 VkRenderPass depthstencil_rp; member in struct:radv_meta_state::__anon4674665a0108
/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_meta_clear.c349 state->clear[i].depthstencil_rp,
694 if (cmd_buffer->device->meta_state.clear[samples_log2].depthstencil_rp == VK_NULL_HANDLE) {
696 &cmd_buffer->device->meta_state.clear[samples_log2].depthstencil_rp);
705 pipeline, cmd_buffer->device->meta_state.clear[samples_log2].depthstencil_rp);
1260 &state->clear[i].depthstencil_rp);
1270 state->clear[i].depthstencil_rp);
1279 state->clear[i].depthstencil_rp);
1289 state->clear[i].depthstencil_rp);
H A Dradv_private.h466 VkRenderPass depthstencil_rp; member in struct:radv_meta_state::__anone2cea0a70108

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