Searched refs:divider (Results 1 - 19 of 19) sorted by relevance

/xsrc/external/mit/freetype/dist/src/psaux/
H A Dpsconv.c204 FT_Long divider = 1; local in function:PS_Conv_ToFixed
261 if ( divider < 0xCCCCCCCL && decimal < 0xCCCCCCCL )
268 divider *= 10;
314 if ( divider == 1 )
316 divider /= 10;
327 if ( divider < 0xCCCCCCCL )
328 divider *= 10;
340 decimal = FT_DivFix( decimal, divider );
/xsrc/external/mit/MesaLib/dist/src/compiler/glsl/glcpp/tests/
H A D147-define-macro-no-space.c15 #define D/ divider
/xsrc/external/mit/MesaLib.old/dist/src/compiler/glsl/glcpp/tests/
H A D147-define-macro-no-space.c15 #define D/ divider
/xsrc/external/mit/xf86-video-siliconmotion/dist/src/
H A Dsmi_501.c456 int32_t multiplier, divider, shift, xclck; local in function:SMI501_FindClock
467 for (divider = 1; divider <= max_divider; divider += 2) {
471 diff = (mclk / (divider << shift << xclck)) - clock;
474 *x2_divider = divider == 1 ? 0 : divider == 3 ? 1 : 2;
501 int32_t multiplier, divider, shift; local in function:SMI501_FindMemClock
507 for (divider = 1; divider <
[all...]
H A Dsmi_501.h260 * 2x clocks must be specified in p2_{shift,divider,select}. */
387 int32_t divider : bits(19, 22); member in struct:_MSOCRegRec::__anone5fa72d70a0a::__anone5fa72d70b08
480 int32_t divider : bits(15, 15); member in struct:_MSOCRegRec::__anone5fa72d7120a::__anone5fa72d71308
H A Dsmi501_crtc.c213 mode->pll_ctl.f.divider = xclck != 1;
/xsrc/external/mit/xf86-video-r128/dist/src/
H A Dr128_crtc.c355 int divider; member in struct:R128InitPLLRegisters::__anon3677fd720108
378 for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
379 save->pll_output_freq = post_div->divider * freq;
387 save->post_div = post_div->divider;
411 int divider; member in struct:R128InitPLL2Registers::__anon3677fd720208
434 for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
435 save->pll_output_freq_2 = post_div->divider * freq;
444 save->post_div_2 = post_div->divider;
/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dlegacy_crtc.c319 This appears to related to the PLL divider registers (fail to lock?).
367 /* R300 uses ref_div_acc field as real ref divider */
1202 int divider; member in struct:RADEONInitPLLRegisters::__anon0af3384b0108
1237 for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
1238 if (post_div->divider == post_divider)
1242 if (!post_div->divider) {
1293 int divider; member in struct:RADEONInitPLL2Registers::__anon0af3384b0208
1326 for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
1327 if (post_div->divider == post_divider)
1331 if (!post_div->divider) {
[all...]
/xsrc/external/mit/xf86-video-ati/xorg-server-copy/
H A Dfi1236.c491 CARD16 divider; local in function:FI1236_tune
497 divider = (f->parm.fcar+(CARD16)frequency) & 0x7fff;
498 f->tuner_data.div1 = (CARD8)((divider>>8)&0x7f);
499 f->tuner_data.div2 = (CARD8)(divider & 0xff);
/xsrc/external/mit/xorg-server.old/dist/hw/xfree86/i2c/
H A Dfi1236.c491 CARD16 divider; local in function:FI1236_tune
497 divider = (f->parm.fcar+(CARD16)frequency) & 0x7fff;
498 f->tuner_data.div1 = (CARD8)((divider>>8)&0x7f);
499 f->tuner_data.div2 = (CARD8)(divider & 0xff);
/xsrc/external/mit/xf86-video-tseng/dist/src/
H A Dtseng_mode.c423 CARD8 divider = N1 << N2; local in function:STG1703Clock
427 temp = Clock * divider;
432 temp = (2 * Clock * divider) / 14318;
443 temp = (14318 * M) / divider;
673 CARD16 divider = M << K; local in function:CH8398Clock
677 temp = (2 * Clock * divider) / 14318;
688 temp = (14318 * N) / divider;
/xsrc/external/mit/xorg-server.old/dist/hw/xfree86/common/
H A Dxf86Mode.c121 int DivFactor, int MulFactor, int *divider)
133 if (divider != NULL)
134 *divider = 0;
144 if (divider != NULL)
145 *divider = (j - 1) * V_CLKDIV2;
120 xf86GetNearestClock(ScrnInfoPtr scrp,int freq,Bool allowDiv2,int DivFactor,int MulFactor,int * divider) argument
H A Dxf86.h296 int DivFactor, int MulFactor, int *divider);
/xsrc/external/mit/xorg-server/dist/hw/xfree86/common/
H A Dxf86Mode.c121 int DivFactor, int MulFactor, int *divider)
133 if (divider != NULL)
134 *divider = 0;
143 if (divider != NULL)
144 *divider = (j - 1) * V_CLKDIV2;
120 xf86GetNearestClock(ScrnInfoPtr scrp,int freq,Bool allowDiv2,int DivFactor,int MulFactor,int * divider) argument
/xsrc/external/mit/MesaLib.old/dist/src/intel/tools/
H A Daubinator_viewer.cpp972 double divider = 1024; local in function:human_size
973 while (v >= divider) {
974 v /= divider;
/xsrc/external/mit/MesaLib/dist/src/intel/tools/
H A Daubinator_viewer.cpp970 double divider = 1024; local in function:human_size
971 while (v >= divider) {
972 v /= divider;
/xsrc/external/mit/xf86-video-sis/dist/src/
H A Dinitextx.c193 float num, denum, postscalar, divider; local in function:SiSBuildBuiltInModeList
272 divider = (sr2b & 0x80) ? 2.0 : 1.0;
281 sr2b, sr2c, divider, postscalar, num, denum);
284 current->Clock = (int)(14318 * (divider / postscalar) * (num / denum));
H A Dsis_driver.c12655 float num, denum, postscalar, divider; local in function:SiSGetClockFromRegs
12658 divider = (sr2b & 0x80) ? 2.0 : 1.0;
12664 myclock = (int)((14318 * (divider / postscalar) * (num / denum)) / 1000);
/xsrc/external/mit/xf86-video-xgi/dist/src/
H A Dxgi_driver.c6408 float num, denum, postscalar, divider; local in function:XGIInternalDDC
6422 divider = (sr2b & 0x80) ? 2.0 : 1.0;
6429 (int) ((14318 * (divider / postscalar) * (num / denum)) / 1000);

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