| /xsrc/external/mit/MesaLib/dist/src/broadcom/vulkan/ |
| H A D | v3dv_query.c | 132 uint64_t *dst64 = (uint64_t *) dst; local in function:write_query_result
133 dst64[idx] = value;
|
| /xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/ |
| H A D | genX_query.c | 168 uint64_t *dst64 = dst_slot; local in function:cpu_write_query_result
169 dst64[value_index] = result;
|
| /xsrc/external/mit/MesaLib/dist/src/intel/vulkan/ |
| H A D | genX_query.c | 382 uint64_t *dst64 = dst_slot; local in function:cpu_write_query_result
383 dst64[value_index] = result;
|
| /xsrc/external/mit/MesaLib.old/dist/src/amd/common/ |
| H A D | ac_nir_to_llvm.c | 409 LLVMValueRef dst64, result; local in function:emit_umul_high
413 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
414 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
415 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
422 LLVMValueRef dst64, result; local in function:emit_imul_high
426 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
427 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
428 result = LLVMBuildTrunc(ctx->builder, dst64, ct
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/amd/llvm/ |
| H A D | ac_nir_to_llvm.c | 374 LLVMValueRef dst64, result; local in function:emit_umul_high
378 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
379 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
380 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
387 LLVMValueRef dst64, result; local in function:emit_imul_high
391 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
392 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
393 result = LLVMBuildTrunc(ctx->builder, dst64, ct
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_lowering_nvc0.cpp | 208 Value *dst64 = lo->getDef(0); local in function:nv50_ir::NVC0LegalizeSSA::handleShift
263 bld.mkOp2(OP_MERGE, TYPE_U64, dst64, dst[0], dst[1]);
292 bld.mkOp2(OP_MERGE, TYPE_U64, dst64, dst[0], dst[1]);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_lowering_nvc0.cpp | 208 Value *dst64 = lo->getDef(0); local in function:nv50_ir::NVC0LegalizeSSA::handleShift
263 bld.mkOp2(OP_MERGE, TYPE_U64, dst64, dst[0], dst[1]);
292 bld.mkOp2(OP_MERGE, TYPE_U64, dst64, dst[0], dst[1]);
|