| /xsrc/external/mit/xf86-video-intel/dist/src/sna/ |
| H A D | kgem_debug_gen3.c | 335 char dstmask[8]; local in function:gen3_get_instruction_dst 340 dstmask[0] = 0; 344 dstmask[dstmask_index++] = '.'; 346 dstmask[dstmask_index++] = 'x'; 348 dstmask[dstmask_index++] = 'y'; 350 dstmask[dstmask_index++] = 'z'; 352 dstmask[dstmask_index++] = 'w'; 353 dstmask[dstmask_index++] = 0; 361 dstmask[0] = 0; 368 sprintf(dstname, "R%d%s%s", dst_nr, dstmask, sa [all...] |
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/ |
| H A D | kgem_debug_gen3.c | 335 char dstmask[8]; local in function:gen3_get_instruction_dst 340 dstmask[0] = 0; 344 dstmask[dstmask_index++] = '.'; 346 dstmask[dstmask_index++] = 'x'; 348 dstmask[dstmask_index++] = 'y'; 350 dstmask[dstmask_index++] = 'z'; 352 dstmask[dstmask_index++] = 'w'; 353 dstmask[dstmask_index++] = 0; 361 dstmask[0] = 0; 368 sprintf(dstname, "R%d%s%s", dst_nr, dstmask, sa [all...] |
| /xsrc/external/mit/libdrm/dist/intel/ |
| H A D | intel_decode.c | 627 char dstmask[8]; local in function:i915_get_instruction_dst 632 dstmask[0] = 0; 636 dstmask[dstmask_index++] = '.'; 638 dstmask[dstmask_index++] = 'x'; 640 dstmask[dstmask_index++] = 'y'; 642 dstmask[dstmask_index++] = 'z'; 644 dstmask[dstmask_index++] = 'w'; 645 dstmask[dstmask_index++] = 0; 653 dstmask[0] = 0; 661 sprintf(dstname, "R%d%s%s", dst_nr, dstmask, sa [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_optimize.c | 583 unsigned dstmask = inst_add->U.I.DstReg.WriteMask; local in function:peephole_add_presub_add 584 unsigned src0_neg = inst_add->U.I.SrcReg[0].Negate & dstmask; 585 unsigned src1_neg = inst_add->U.I.SrcReg[1].Negate & dstmask; 598 /* if src0 is negative, at least all bits of dstmask have to be set */ 599 if (inst_add->U.I.SrcReg[0].Negate && src0_neg != dstmask) 602 /* if src1 is negative, at least all bits of dstmask have to be set */ 603 if (inst_add->U.I.SrcReg[1].Negate && src1_neg != dstmask)
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_optimize.c | 585 unsigned dstmask = inst_add->U.I.DstReg.WriteMask; local in function:peephole_add_presub_add 586 unsigned src0_neg = inst_add->U.I.SrcReg[0].Negate & dstmask; 587 unsigned src1_neg = inst_add->U.I.SrcReg[1].Negate & dstmask; 600 /* if src0 is negative, at least all bits of dstmask have to be set */ 601 if (inst_add->U.I.SrcReg[0].Negate && src0_neg != dstmask) 604 /* if src1 is negative, at least all bits of dstmask have to be set */ 605 if (inst_add->U.I.SrcReg[1].Negate && src1_neg != dstmask)
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| /xsrc/external/mit/MesaLib/dist/src/panfrost/vulkan/ |
| H A D | panvk_vX_meta_copy.c | 394 enum pipe_format dstfmt, unsigned dstmask, 512 if (dstcompsz > 8 && dstmask != fullmask) { 517 if (dstmask & BITFIELD_BIT(i)) 589 unsigned dstmask; member in struct:panvk_meta_copy_img2img_format_info 668 .dstmask = panvk_meta_copy_img_mask(dst->pimage.layout.format, 825 panvk_meta_copy_img2img_fmts[i].dstmask, 831 panvk_meta_copy_img2img_fmts[i].dstmask, 843 panvk_meta_copy_img2img_fmts[i].dstmask, 849 panvk_meta_copy_img2img_fmts[i].dstmask, 391 panvk_meta_copy_img2img_shader(struct panfrost_device * pdev,struct pan_pool * bin_pool,enum pipe_format srcfmt,enum pipe_format dstfmt,unsigned dstmask,unsigned texdim,bool texisarray,bool is_ms,struct pan_shader_info * shader_info) argument
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| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/r200/ |
| H A D | r200_fragshader.c | 272 GLuint dstmask = inst->DstReg[optype].dstMask; local in function:r200UpdateFSArith 279 SET_INST_2(opnum, optype) |= dstmask_table[dstmask];
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| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/r200/ |
| H A D | r200_fragshader.c | 114 /* first slot never used, GL_NONE translated to RGB by mesa and you can't get a 0 dstmask. */ 274 GLuint dstmask = inst->DstReg[optype].dstMask; local in function:r200UpdateFSArith 281 SET_INST_2(opnum, optype) |= dstmask_table[dstmask];
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