Searched refs:fenced (Results 1 - 14 of 14) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_batchbuffer.h98 size_t offset, boolean fenced)
100 return batch->iws->batchbuffer_reloc(batch, buffer, usage, offset, fenced);
95 i915_winsys_batchbuffer_reloc(struct i915_winsys_batchbuffer * batch,struct i915_winsys_buffer * buffer,enum i915_winsys_buffer_usage usage,size_t offset,boolean fenced) argument
H A Di915_winsys.h123 * @fenced relocation needs a fence.
128 unsigned offset, boolean fenced);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_batchbuffer.h99 size_t offset, bool fenced)
101 return batch->iws->batchbuffer_reloc(batch, buffer, usage, offset, fenced);
96 i915_winsys_batchbuffer_reloc(struct i915_winsys_batchbuffer * batch,struct i915_winsys_buffer * buffer,enum i915_winsys_buffer_usage usage,size_t offset,bool fenced) argument
H A Di915_winsys.h115 * @fenced relocation needs a fence.
120 unsigned offset, bool fenced);
/xsrc/external/mit/libdrm/dist/intel/
H A Dintel_bufmgr_fake.c94 * fenced.
98 * Marks that the block is currently fenced (being used by rendering)
101 unsigned fenced:1; member in struct:block
125 * fenced yet.
132 struct block fenced; member in struct:_bufmgr_fake
461 block->on_hardware, block->fenced);
479 } else if (block->fenced) {
586 * Removes all objects from the fenced list older than the given fence.
595 DRMLISTFOREACHSAFE(block, tmp, &bufmgr_fake->fenced) {
596 assert(block->fenced);
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/gallium/winsys/svga/drm/
H A Dpb_buffer_simple_fenced.c30 * Implementation of fenced buffers.
78 * All fenced buffers are placed in this listed, ordered from the oldest
81 struct list_head fenced; member in struct:fenced_manager
156 * Dump the fenced buffer list.
185 curr = fenced_mgr->fenced.next;
187 while(curr != &fenced_mgr->fenced) {
228 * Add the buffer to the fenced list.
245 LIST_ADDTAIL(&fenced_buf->head, &fenced_mgr->fenced);
251 * Remove the buffer from the fenced list, and potentially destroy the buffer
288 * Wait for the fence to expire, and remove it from the fenced lis
[all...]
/xsrc/external/mit/MesaLib/dist/src/gallium/winsys/svga/drm/
H A Dpb_buffer_simple_fenced.c30 * Implementation of fenced buffers.
78 * All fenced buffers are placed in this listed, ordered from the oldest
81 struct list_head fenced; member in struct:fenced_manager
156 * Dump the fenced buffer list.
185 curr = fenced_mgr->fenced.next;
187 while(curr != &fenced_mgr->fenced) {
228 * Add the buffer to the fenced list.
245 list_addtail(&fenced_buf->head, &fenced_mgr->fenced);
251 * Remove the buffer from the fenced list, and potentially destroy the buffer
288 * Wait for the fence to expire, and remove it from the fenced lis
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/gallium/winsys/i915/drm/
H A Di915_drm_batchbuffer.c98 unsigned pre_add, boolean fenced)
134 if (fenced)
95 i915_drm_batchbuffer_reloc(struct i915_winsys_batchbuffer * ibatch,struct i915_winsys_buffer * buffer,enum i915_winsys_buffer_usage usage,unsigned pre_add,boolean fenced) argument
/xsrc/external/mit/MesaLib/dist/src/gallium/winsys/i915/drm/
H A Di915_drm_batchbuffer.c98 unsigned pre_add, bool fenced)
134 if (fenced)
95 i915_drm_batchbuffer_reloc(struct i915_winsys_batchbuffer * ibatch,struct i915_winsys_buffer * buffer,enum i915_winsys_buffer_usage usage,unsigned pre_add,bool fenced) argument
/xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/pipebuffer/
H A Dpb_buffer_fenced.c30 * Implementation of fenced buffers.
89 * All fenced buffers are placed in this listed, ordered from the oldest
92 struct list_head fenced; member in struct:fenced_manager
192 * Dump the fenced buffer list.
221 curr = fenced_mgr->fenced.next;
223 while (curr != &fenced_mgr->fenced) {
265 * Add the buffer to the fenced list.
282 LIST_ADDTAIL(&fenced_buf->head, &fenced_mgr->fenced);
288 * Remove the buffer from the fenced list, and potentially destroy the buffer
325 * Wait for the fence to expire, and remove it from the fenced lis
[all...]
/xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/pipebuffer/
H A Dpb_buffer_fenced.c30 * Implementation of fenced buffers.
89 * All fenced buffers are placed in this listed, ordered from the oldest
92 struct list_head fenced; member in struct:fenced_manager
192 * Dump the fenced buffer list.
221 curr = fenced_mgr->fenced.next;
223 while (curr != &fenced_mgr->fenced) {
265 * Add the buffer to the fenced list.
282 list_addtail(&fenced_buf->head, &fenced_mgr->fenced);
288 * Remove the buffer from the fenced list, and potentially destroy the buffer
325 * Wait for the fence to expire, and remove it from the fenced lis
[all...]
/xsrc/external/mit/MesaLib/dist/.gitlab/issue_templates/
H A DBug Report.md15 Please post `inxi -GSC -xx` output ([fenced with triple backticks](https://docs.gitlab.com/ee/user/markdown.html#code-spans-and-blocks)) OR fill information below manually
H A DBug Report - AMD Radeon Vulkan.md43 Please post `inxi -GSC -xx` output ([fenced with triple backticks](https://docs.gitlab.com/ee/user/markdown.html#code-spans-and-blocks)) OR fill information below manually
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D7.10.rst940 - r600g: add bo fenced list.

Completed in 12 milliseconds