| /xsrc/external/mit/xf86-video-intel/dist/src/render_program/ |
| exa_wm_mask_affine.g6a | 36 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_mask_affine.g7a | 36 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_src_affine.g6a | 36 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_src_affine.g7a | 36 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_mask_projective.g6a | 41 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_mask_projective.g7a | 41 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_src_projective.g6a | 41 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_src_projective.g7a | 41 define(`bh', `g4.0<8,8,1>F')
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| exa_sf.g5a | 71 * G4 is V1 Vertex Attribute Data from URB (lower right)
73 * G4.0 u1
74 * G4.4 v1
87 add (4) g7<1>F g4<4,4,1>F -g5<4,4,1>F { align1 };
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| /xsrc/external/mit/xf86-video-intel-2014/dist/src/render_program/ |
| exa_wm_mask_affine.g6a | 36 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_mask_affine.g7a | 36 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_src_affine.g6a | 36 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_src_affine.g7a | 36 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_src_affine.g8a | 36 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_mask_projective.g6a | 41 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_mask_projective.g7a | 41 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_src_projective.g6a | 41 define(`bh', `g4.0<8,8,1>F')
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| exa_wm_src_projective.g7a | 41 define(`bh', `g4.0<8,8,1>F')
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| /xsrc/external/mit/MesaLib/dist/src/mesa/sparc/ |
| sparc_clip.S | 95 ld [%i0 + 0x08], %g4 ! LSU Group
99 addcc %g4, %g4, %g4 ! IEU1 Group
101 subcc %g5, %g4, %g0 ! IEU1 Group
102 ld [%i0 + 0x04], %g4 ! LSU Group
104 addcc %g4, %g4, %g4 ! IEU1 Group
106 subcc %g5, %g4, %g0 ! IEU1 Grou
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/sparc/ |
| sparc_clip.S | 108 ld [%i0 + 0x08], %g4 ! LSU Group
112 addcc %g4, %g4, %g4 ! IEU1 Group
114 subcc %g5, %g4, %g0 ! IEU1 Group
115 ld [%i0 + 0x04], %g4 ! LSU Group
117 addcc %g4, %g4, %g4 ! IEU1 Group
119 subcc %g5, %g4, %g0 ! IEU1 Grou
[all...] |
| /xsrc/external/mit/xf86-video-sunffb/dist/src/ |
| ffb_asm.s | 78 ldx [%o1 + 0x18], %g4
89 stx %g4, [%o0 - 0x28]
128 lduh [%o4 + POINT_Y], %g4 /* Load Group */
132 sllx %g4, 32, %g4 /* IEU0 */
133 or %g3, %g4, %g3 /* IEU0 Group */
136 sllx %o5, 32, %g4 /* IEU0 Group */
144 or %g4, %g7, %g4 /* IEU1 */
155 stx %g4, [%o1 + FFB_DY] /* STORE Group *
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/intel/tools/tests/gen7/ |
| math.asm | 6 math sqrt(16) g6<1>F g4<8,8,1>F null<8,8,1>F { align1 1H };
12 math log(16) g4<1>F g44<8,8,1>F null<8,8,1>F { align1 1H };
23 math intdiv(8) g4<1>D g2<0,1,0>D g2.4<0,1,0>D { align1 1Q };
24 math intdiv(8) g4<1>D g2<0,1,0>D g2.4<0,1,0>D { align1 2Q };
32 math intdiv(8) g126<1>UD g4<0,1,0>UD g6<8,8,1>UD { align1 1Q };
33 math intdiv(8) g125<1>UD g4<0,1,0>UD g7<8,8,1>UD { align1 2Q };
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| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| test_eu_compact.cpp | 264 struct brw_reg g4 = brw_vec8_grf(4, 0); local
266 brw_ADD(p, g0, g2, g4);
297 struct brw_reg g4 = brw_vec8_grf(4, 0); local
299 brw_ADD(p, m6, g2, g4);
306 struct brw_reg g4 = brw_vec1_grf(4, 0); local
308 brw_ADD(p, g0, g2, g4);
315 struct brw_reg g4 = brw_vec8_grf(4, 0); local
317 brw_PLN(p, m6, interp, g4);
|
| /xsrc/external/mit/MesaLib/dist/src/intel/tools/tests/gen9/ |
| math.asm | 5 math intmod(8) g4<1>UD g1<0,1,0>UD g1.2<0,1,0>UD { align1 2Q };
13 math cos(16) g4<1>F g2<8,8,1>F null<8,8,1>F { align1 1H };
14 math intdiv(8) g4<1>UD g1<0,1,0>UD g1.4<0,1,0>UD { align1 1Q };
16 math intdiv(8) g24<1>D g4<0,1,0>D g2.2<0,1,0>D { align1 1Q };
|
| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| test_eu_compact.cpp | 177 struct brw_reg g4 = brw_vec8_grf(4, 0); local
179 brw_ADD(p, g0, g2, g4);
214 struct brw_reg g4 = brw_vec8_grf(4, 0); local
216 brw_ADD(p, m6, g2, g4);
224 struct brw_reg g4 = brw_vec1_grf(4, 0); local
226 brw_ADD(p, g0, g2, g4);
234 struct brw_reg g4 = brw_vec8_grf(4, 0); local
236 brw_PLN(p, m6, interp, g4);
|
