Searched refs:last_target (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_state_streamout.c218 unsigned last_target = 0; local in function:gfx10_emit_streamout_begin
222 last_target = i;
245 S_411_DST_SEL(V_411_GDS) | S_411_CP_SYNC(i == last_target));
250 radeon_emit(S_415_BYTE_COUNT_GFX9(4) | S_415_DISABLE_WR_CONFIRM_GFX9(i != last_target));
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dsna_render.h368 uint32_t last_target; member in struct:gen3_render_state
H A Dgen3_render.c2705 state->last_target = 0;
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dsna_render.h360 uint32_t last_target; member in struct:gen3_render_state
H A Dgen3_render.c2659 state->last_target = 0;
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_cmd_buffer.c8183 unsigned last_target = util_last_bit(so->enabled_mask) - 1; local in function:gfx10_emit_streamout_begin
8222 S_411_DST_SEL(V_411_GDS) | S_411_CP_SYNC(i == last_target));
8227 radeon_emit(cs, S_415_BYTE_COUNT_GFX9(4) | S_415_DISABLE_WR_CONFIRM_GFX9(i != last_target));

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