| /xsrc/external/mit/MesaLib/dist/src/mesa/vbo/ |
| vbo_save_draw.c | 204 const GLbitfield enabled = node->merged.gallium.enabled_attribs[mode];
225 struct pipe_vertex_state *state = node->merged.gallium.state[mode];
226 struct pipe_draw_vertex_state_info info = node->merged.gallium.info;
234 if (node->merged.gallium.ctx == ctx) {
251 int * const private_refcount = (int*)&node->merged.gallium.private_refcount[mode];
273 if (node->merged.mode || node->merged.num_draws > 1) {
275 node->merged.start_counts,
276 node->merged.mode,
277 node->merged.num_draws
[all...] |
| vbo_save_api.c | 77 * - some primitives are merged together (eg: two consecutive GL_TRIANGLES
78 * with 3 vertices can be merged in a single GL_TRIANGLES with 6 vertices).
853 memset(&node->merged.info, 0, sizeof(struct pipe_draw_info));
855 node->merged.info.index_size = 4;
856 node->merged.info.instance_count = 1;
857 node->merged.info.index.gl_bo = node->cold->ib.obj;
859 node->merged.info.mode = merged_prims[0].mode;
860 node->merged.start_count.start = merged_prims[0].start;
861 node->merged.start_count.count = merged_prims[0].count;
862 node->merged.start_count.index_bias = 0
[all...] |
| vbo_save.h | 75 } merged; member in struct:vbo_save_vertex_list
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/pipe-loader/ |
| pipe_loader.c | 94 driOptionDescription *merged = malloc((driver_count + gallium_count) * local
95 sizeof(*merged));
96 if (!merged) {
101 memcpy(merged, gallium_driconf, sizeof(*merged) * gallium_count);
102 memcpy(&merged[gallium_count], driver_driconf, sizeof(*merged) * driver_count);
105 return merged;
|
| /xsrc/external/mit/MesaLib/dist/src/virtio/vulkan/ |
| vn_device.c | 143 const char **merged = local
144 vk_alloc(alloc, sizeof(*merged) * (ext_count + extra_count),
146 if (!merged)
152 merged[count++] = exts[i];
156 merged[count++] = extra_exts[i];
159 *out_exts = merged;
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/ |
| ir3_postsched.c | 349 bool merged; member in struct:ir3_postsched_deps_state
357 * the half and full precision register files are "merged" (conflict,
426 if (state->merged) {
496 .merged = ctx->v->mergedregs,
510 .merged = ctx->v->mergedregs,
|
| /xsrc/external/mit/MesaLib/dist/src/amd/registers/ |
| makeregheader.py | 115 Returns False if field_in_type1 and field_in_type2 can be merged
207 merged = False
228 merged = True
230 if not merged:
|
| regdb.py | 244 merged = False
258 merged = True
261 if merged:
319 same key can be merged.
556 # Walk register mappings to find register types that should be merged.
579 # Walk over regtype sets that are to be merged and find enums that
580 # should be merged.
611 # update _all_ references to the merged enums (some may be from
612 # register types that aren't going to be merged).
644 assert len(enum_refs) == 1 # should be ensured by how we determine the enums to be merged
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/compiler/nir/ |
| nir_lower_bit_size.c | 326 nir_ssa_def *merged = nir_pack_64_2x32_split(b, &lowered[0]->dest.ssa, &lowered[1]->dest.ssa); local
327 nir_ssa_def_rewrite_uses(&phi->dest.ssa, merged);
|
| nir_opt_copy_prop_vars.c | 300 nir_component_mask_t merged = (uintptr_t) new_entry->data | local
302 old_entry->data = (void *) ((uintptr_t) merged);
|
| /xsrc/external/mit/libXt/dist/src/ |
| Event.c | 1098 XRectangle merged, bbox; local
1101 merged.x = MIN(rect.x, bbox.x);
1102 merged.y = MIN(rect.y, bbox.y);
1103 merged.width = (unsigned short) (MAX(rect.x + rect.width,
1104 bbox.x + bbox.width) - merged.x);
1105 merged.height = (unsigned short) (MAX(rect.y + rect.height,
1106 bbox.y + bbox.height) - merged.y);
1107 XUnionRectWithRegion(&merged, region, region);
|
| /xsrc/external/mit/MesaLib.old/dist/src/compiler/nir/ |
| nir_opt_copy_prop_vars.c | 252 nir_component_mask_t merged = (uintptr_t) new_entry->data | local
254 old_entry->data = (void *) ((uintptr_t) merged);
|
| /xsrc/external/mit/MesaLib.old/dist/src/freedreno/ir3/ |
| ir3.h | 101 bool merged : 1; /* half-regs conflict with full regs (ie >= a6xx) */ member in struct:ir3_register
1413 if (reg->merged) {
|
| ir3.c | 923 reg->merged = true;
|
| /xsrc/external/mit/MesaLib/dist/src/panfrost/bifrost/ |
| bi_schedule.c | 1395 uint64_t *merged, unsigned *pcrel_pair)
1409 if (merged[s] == val && (*pcrel_pair) != s) {
1417 merged[idx] = val;
1514 /* Given merged constants, one of which might be PC-relative, fix up the M
|
| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| radv_nir_to_llvm.c | 172 /* On GFX10, VS is merged into GS for NGG. */
2350 prepare_gs_input_vgprs(struct radv_shader_context *ctx, bool merged)
2352 if (merged) {
2515 * a merged shader.
|
| /xsrc/external/mit/MesaLib/dist/src/mesa/main/ |
| dlist.c | 802 if (node->merged.gallium.private_refcount[mode]) {
803 assert(node->merged.gallium.private_refcount[mode] > 0);
804 p_atomic_add(&node->merged.gallium.state[mode]->reference.count,
805 -node->merged.gallium.private_refcount[mode]);
807 pipe_vertex_state_reference(&node->merged.gallium.state[mode], NULL);
810 if (node->merged.mode) {
811 free(node->merged.mode);
812 free(node->merged.start_counts);
|
