Searched refs:merged (Results 1 - 25 of 40) sorted by relevance

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/xsrc/external/mit/MesaLib/dist/src/mesa/vbo/
H A Dvbo_save_draw.c204 const GLbitfield enabled = node->merged.gallium.enabled_attribs[mode];
225 struct pipe_vertex_state *state = node->merged.gallium.state[mode];
226 struct pipe_draw_vertex_state_info info = node->merged.gallium.info;
234 if (node->merged.gallium.ctx == ctx) {
251 int * const private_refcount = (int*)&node->merged.gallium.private_refcount[mode];
273 if (node->merged.mode || node->merged.num_draws > 1) {
275 node->merged.start_counts,
276 node->merged.mode,
277 node->merged
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H A Dvbo_save_api.c77 * - some primitives are merged together (eg: two consecutive GL_TRIANGLES
78 * with 3 vertices can be merged in a single GL_TRIANGLES with 6 vertices).
853 memset(&node->merged.info, 0, sizeof(struct pipe_draw_info));
855 node->merged.info.index_size = 4;
856 node->merged.info.instance_count = 1;
857 node->merged.info.index.gl_bo = node->cold->ib.obj;
859 node->merged.info.mode = merged_prims[0].mode;
860 node->merged.start_count.start = merged_prims[0].start;
861 node->merged.start_count.count = merged_prims[0].count;
862 node->merged
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H A Dvbo_save.h75 } merged; member in struct:vbo_save_vertex_list
/xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/pipe-loader/
H A Dpipe_loader.c94 driOptionDescription *merged = malloc((driver_count + gallium_count) * local in function:merge_driconf
95 sizeof(*merged));
96 if (!merged) {
101 memcpy(merged, gallium_driconf, sizeof(*merged) * gallium_count);
102 memcpy(&merged[gallium_count], driver_driconf, sizeof(*merged) * driver_count);
105 return merged;
/xsrc/external/mit/MesaLib/dist/src/virtio/vulkan/
H A Dvn_device.c143 const char **merged = local in function:merge_extension_names
144 vk_alloc(alloc, sizeof(*merged) * (ext_count + extra_count),
146 if (!merged)
152 merged[count++] = exts[i];
156 merged[count++] = extra_exts[i];
159 *out_exts = merged;
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D18.1.2.rst38 - radv: Consolidate GFX9 merged shader lookup logic
39 - radv: Handle GFX9 merged shaders in radv_flush_constants()
H A D11.0.7.rst33 Spilling failure of b96 merged value
H A D18.1.5.rst148 - radv: fix a memleak for merged shaders on GFX9
H A D19.2.2.rst68 - radv: Fix single stage constant flush with merged shaders.
H A D20.1.6.rst118 - aco: set constant_data_offset correctly in the case of merged shaders
H A D17.1.6.rst164 - radeonsi/gfx9: fix crash building monolithic merged ES-GS shader
H A D11.1.0.rst108 Spilling failure of b96 merged value
H A D11.2.0.rst66 Spilling failure of b96 merged value
/xsrc/external/mit/MesaLib/dist/src/amd/compiler/
H A DREADME.md134 * LS = Local Shader (merged into HS on GFX9+), only runs SW VS when tessellation is used
136 * ES = Export Shader (merged into GS on GFX9+), if there is a GS in the SW pipeline, the preceding stage (ie. SW VS or SW TES) always has to run on this HW stage
155 ##### Notes about merged shaders
157 The merged stages on GFX9 (and GFX10/legacy) are: LSHS and ESGS. On GFX10/NGG the ESGS is merged with HW VS into NGG GS.
161 This is why merged shaders get an argument called `merged_wave_info` which tells how many invocations each part needs,
185 * HW LS and HS stages are merged, and the merged shader still uses LDS in the same way as before
186 * HW ES and GS stages are merged, so ES outputs can go to LDS instead of VRAM
198 * HW GS and VS stages are now merged, an
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/xsrc/external/mit/MesaLib/dist/src/amd/registers/
H A Dmakeregheader.py115 Returns False if field_in_type1 and field_in_type2 can be merged
207 merged = False
228 merged = True
230 if not merged:
H A Dregdb.py244 merged = False
258 merged = True
261 if merged:
319 same key can be merged.
556 # Walk register mappings to find register types that should be merged.
579 # Walk over regtype sets that are to be merged and find enums that
580 # should be merged.
611 # update _all_ references to the merged enums (some may be from
612 # register types that aren't going to be merged).
644 assert len(enum_refs) == 1 # should be ensured by how we determine the enums to be merged
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/xsrc/external/mit/libdrm/dist/
H A DCONTRIBUTING.rst64 spelling fixes and whitespace adjustment) patches that have been merged
66 drivers, merged patches to those components also count towards the commit
/xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/
H A Dir3_postsched.c349 bool merged; member in struct:ir3_postsched_deps_state
357 * the half and full precision register files are "merged" (conflict,
426 if (state->merged) {
496 .merged = ctx->v->mergedregs,
510 .merged = ctx->v->mergedregs,
/xsrc/external/mit/libXt/dist/src/
H A DEvent.c1098 XRectangle merged, bbox; local in function:AddExposureToRectangularRegion
1101 merged.x = MIN(rect.x, bbox.x);
1102 merged.y = MIN(rect.y, bbox.y);
1103 merged.width = (unsigned short) (MAX(rect.x + rect.width,
1104 bbox.x + bbox.width) - merged.x);
1105 merged.height = (unsigned short) (MAX(rect.y + rect.height,
1106 bbox.y + bbox.height) - merged.y);
1107 XUnionRectWithRegion(&merged, region, region);
/xsrc/external/mit/MesaLib/dist/src/compiler/nir/
H A Dnir_lower_bit_size.c326 nir_ssa_def *merged = nir_pack_64_2x32_split(b, &lowered[0]->dest.ssa, &lowered[1]->dest.ssa); local in function:split_phi
327 nir_ssa_def_rewrite_uses(&phi->dest.ssa, merged);
H A Dnir_opt_copy_prop_vars.c300 nir_component_mask_t merged = (uintptr_t) new_entry->data | local in function:gather_vars_written
302 old_entry->data = (void *) ((uintptr_t) merged);
/xsrc/external/mit/MesaLib/dist/docs/ci/
H A Dindex.rst72 contributors without permissions to download non-redistributable traces can be merged
211 is eventually merged to main, a full image rebuild will occur again
/xsrc/external/mit/MesaLib.old/dist/src/compiler/nir/
H A Dnir_opt_copy_prop_vars.c252 nir_component_mask_t merged = (uintptr_t) new_entry->data | local in function:gather_vars_written
254 old_entry->data = (void *) ((uintptr_t) merged);
/xsrc/external/mit/MesaLib.old/dist/src/freedreno/ir3/
H A Dir3.h101 bool merged : 1; /* half-regs conflict with full regs (ie >= a6xx) */ member in struct:ir3_register
1413 if (reg->merged) {
/xsrc/external/mit/MesaLib/dist/src/panfrost/bifrost/
H A Dbi_schedule.c1395 uint64_t *merged, unsigned *pcrel_pair)
1409 if (merged[s] == val && (*pcrel_pair) != s) {
1417 merged[idx] = val;
1514 /* Given merged constants, one of which might be PC-relative, fix up the M
1394 bi_merge_pairs(struct bi_const_state * consts,unsigned tuple_count,uint64_t * merged,unsigned * pcrel_pair) argument

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