Searched refs:meta_size (Results 1 - 14 of 14) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/freedreno/a6xx/
H A Dfd6_resource.c247 uint32_t meta_size = local in function:fd6_fill_ubwc_buffer_sizes
255 rsc->offset = meta_size;
257 rsc->ubwc_size = meta_size >> 2; /* in dwords??? */
260 return meta_size;
/xsrc/external/mit/MesaLib/dist/src/amd/common/
H A Dac_surface.c692 dcc_level->dcc_offset = surf->meta_size;
694 surf->meta_size = dcc_level->dcc_offset + AddrDccOut->dccRamSize;
745 surf->meta_size = 0;
771 surf->meta_size = AddrHtileOut->htileBytes;
1164 surf->meta_size = 0;
1305 if (!(surf->flags & RADEON_SURF_Z_OR_SBUFFER) && surf->meta_size && config->info.levels > 1) {
1314 surf->meta_size = align64(surf->surf_size >> 8, (1 << surf->meta_alignment_log2) * 4);
1321 surf->meta_size && config->info.levels > 1) {
1327 surf->meta_size = (total_pixels / htile_block_size) * htile_element_size;
1328 surf->meta_size
[all...]
H A Dac_surface.h368 uint32_t meta_size; member in struct:radeon_surf
H A Dac_surface_modifier_test.c324 assert(surf.meta_size == dcc_size);
/xsrc/external/mit/MesaLib/dist/src/gallium/winsys/radeon/drm/
H A Dradeon_drm_surface.c290 surf->meta_size = 0;
346 surf->meta_size = num_layers * align(slice_bytes, base_align);
441 if (surf_ws->meta_size) {
443 surf_ws->total_size = surf_ws->meta_offset + surf_ws->meta_size;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_clear.c316 clear_size = tex->surface.meta_size;
339 clear_size = tex->surface.meta_size;
836 zstex->surface.meta_offset, zstex->surface.meta_size, clear_value);
861 htile_size = zstex->surface.meta_size;
868 htile_size = zstex->surface.meta_size;
H A Dsi_texture.c1039 tex->surface.meta_size, clear_value);
1054 tex->surface.meta_size, DCC_CLEAR_COLOR_0000);
1059 tex->surface.meta_size, DCC_UNCOMPRESSED);
1066 tex->surface.meta_size, DCC_UNCOMPRESSED);
1086 if (size != tex->surface.meta_size) {
1089 tex->surface.meta_size - size, DCC_UNCOMPRESSED);
H A Dsi_blit.c1397 tex->surface.meta_size, &clear_value, 4, SI_OP_SYNC_AFTER,
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_meta_dcc_retile.c226 .range = image->planes[0].surface.meta_size,
H A Dradv_meta_clear.c1482 size = image->planes[0].surface.meta_size;
H A Dradv_private.h2075 image->planes[0].surface.meta_size;
H A Dradv_cmd_buffer.c7443 if (size != image->planes[0].surface.meta_size) {
7446 image->planes[0].surface.meta_size - size, 0xffffffff);
H A Dradv_device.c2801 .size = radv_image_from_handle(image)->planes[0].surface.meta_size,
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/
H A Dr600_texture.c757 rtex->surface.meta_size = 0;
805 rtex->surface.meta_size =
815 if (!rtex->surface.meta_size)
819 rtex->size = rtex->htile_offset + rtex->surface.meta_size;
861 rtex->htile_offset, rtex->surface.meta_size,
999 rtex->surface.meta_size,

Completed in 52 milliseconds