| /xsrc/external/mit/MesaLib/dist/src/panfrost/midgard/ |
| midgard_print_constant.c | 34 midgard_reg_mode reg_mode, bool half,
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| disassemble.c | 129 midgard_reg_mode reg_mode)
374 bits_for_mode(midgard_reg_mode mode)
392 bits_for_mode_halved(midgard_reg_mode mode, bool half)
404 midgard_reg_mode reg_mode,
436 midgard_reg_mode reg_mode,
466 midgard_reg_mode mode,
661 midgard_reg_mode mode, unsigned reg,
818 midgard_reg_mode mode = alu_field->reg_mode;
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| helpers.h | 274 /* Lower 2-bits are a midgard_reg_mode */
421 unsigned c, midgard_reg_mode reg_mode, bool half,
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| midgard_print.c | 121 midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins));
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| midgard.h | 258 } midgard_reg_mode; typedef in typeref:enum:__anon2819
279 /* The expand options depend on both midgard_int_mod and midgard_reg_mode. For
316 midgard_reg_mode reg_mode : 2;
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| compiler.h | 508 midgard_reg_mode reg_mode_for_bitsize(unsigned bitsize);
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| midgard_emit.c | 246 midgard_reg_mode reg_mode = reg_mode_for_bitsize(base_size);
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| midgard_compile.c | 2598 midgard_reg_mode
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/panfrost/midgard/ |
| midgard.h | 171 } midgard_reg_mode; typedef in typeref:enum:__anon3900
210 midgard_reg_mode reg_mode : 2;
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| disassemble.c | 135 midgard_reg_mode mode, unsigned reg,
278 bits_for_mode(midgard_reg_mode mode)
295 print_dest(unsigned reg, midgard_reg_mode mode, midgard_dest_override override, bool out_high)
347 midgard_reg_mode mode = alu_field->reg_mode;
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