| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| H A D | radv_acceleration_structure.c | 804 b, 1, comp_bits, nir_iadd(b, addr, nir_imm_int64(b, j * comp_bytes)), 983 nir_push_if(&b, nir_ine(&b, transform_addr, nir_imm_int64(&b, 0))); 986 nir_build_load_global(&b, 4, 32, nir_iadd(&b, transform_addr, nir_imm_int64(&b, 0)), 991 nir_build_load_global(&b, 4, 32, nir_iadd(&b, transform_addr, nir_imm_int64(&b, 16)), 996 nir_build_load_global(&b, 4, 32, nir_iadd(&b, transform_addr, nir_imm_int64(&b, 32)), 1014 nir_iadd(&b, triangle_node_dst_addr, nir_imm_int64(&b, i * 16)), 1039 nir_build_load_global(&b, 3, 32, nir_iadd(&b, aabb_addr, nir_imm_int64(&b, 0)), 1042 nir_build_load_global(&b, 3, 32, nir_iadd(&b, aabb_addr, nir_imm_int64(&b, 12)), 1055 nir_iadd(&b, aabb_node_dst_addr, nir_imm_int64(&b, 0)), 1058 nir_iadd(&b, aabb_node_dst_addr, nir_imm_int64( [all...] |
| H A D | radv_pipeline_rt.c | 350 load_addr = nir_iadd(b, load_addr, nir_imm_int64(b, offset)); 356 nir_ssa_def *record_addr = nir_iadd(b, addr, nir_imm_int64(b, RADV_RT_HANDLE_SIZE)); 396 nir_iadd(b, instance_addr, nir_imm_int64(b, offset + i * 16)), 637 nir_iadd(&b_shader, instance_node_addr, nir_imm_int64(&b_shader, 92 + c * 12)), 649 nir_iadd(&b_shader, instance_node_addr, nir_imm_int64(&b_shader, 16)), 653 nir_iadd(&b_shader, instance_node_addr, nir_imm_int64(&b_shader, 32)), 657 nir_iadd(&b_shader, instance_node_addr, nir_imm_int64(&b_shader, 48)), 1135 return nir_iand(b, node, nir_imm_int64(b, (bvh_size - 1) << 3)); 1141 nir_ssa_def *addr = nir_iand(b, node, nir_imm_int64(b, ~7ull)); 1146 ? nir_ior(b, addr, nir_imm_int64( [all...] |
| H A D | radv_query.c | 159 nir_store_var(&b, result, nir_imm_int64(&b, 0), 0x1); 181 nir_ssa_def *start_done = nir_ilt(&b, nir_load_var(&b, start), nir_imm_int64(&b, 0)); 182 nir_ssa_def *end_done = nir_ilt(&b, nir_load_var(&b, end), nir_imm_int64(&b, 0)); 359 nir_store_ssbo(&b, nir_imm_int64(&b, 0), dst_buf, output_elem, .write_mask = 0x1, 422 nir_store_var(&b, result, nir_vec2(&b, nir_imm_int64(&b, 0), nir_imm_int64(&b, 0)), 0x3); 546 nir_store_var(&b, result, nir_imm_int64(&b, 0), 0x1); 574 nir_i2b(&b, nir_ine(&b, timestamp, nir_imm_int64(&b, TIMESTAMP_NOT_READY)));
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| /xsrc/external/mit/MesaLib/dist/src/panfrost/lib/ |
| H A D | pan_indirect_dispatch.c | 178 nir_ssa_def *type_ptr = nir_iadd(&b, job_hdr_ptr, nir_imm_int64(&b, 4 * 4)); 185 nir_imm_int64(&b, pan_section_offset(COMPUTE_JOB, INVOCATION))); 210 nir_push_if(&b, nir_ine(&b, num_wg_x_ptr, nir_imm_int64(&b, 0)));
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| H A D | pan_indirect_draw.c | 463 nir_ishl(b, nir_imm_int64(b, 1), 857 base = nir_iand(b, base, nir_imm_int64(b, ~3ULL)); 966 IF (nir_ine(b, builder->jobs.first_vertex_sysval, nir_imm_int64(b, 0))) { 971 IF (nir_ine(b, builder->jobs.base_vertex_sysval, nir_imm_int64(b, 0))) { 979 IF (nir_ine(b, builder->jobs.base_instance_sysval, nir_imm_int64(b, 0))) { 1017 base = nir_iand(b, base, nir_imm_int64(b, ~3ULL));
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| /xsrc/external/mit/MesaLib/dist/src/compiler/nir/ |
| H A D | nir_lower_int64.c | 332 return lower_isub64(b, nir_imm_int64(b, 0), x); 630 return nir_bcsel(b, nir_ieq_imm(b, r, 0), nir_imm_int64(b, 0), 694 x_sign = nir_bcsel(b, COND_LOWER_CMP(b, ilt, x, nir_imm_int64(b, 0)), 728 nir_ssa_def *lsb_mask = COND_LOWER_OP(b, ishl, nir_imm_int64(b, 1), discard); 729 nir_ssa_def *rem_mask = COND_LOWER_OP(b, isub, lsb_mask, nir_imm_int64(b, 1));
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| H A D | nir_builder.h | 400 nir_imm_int64(nir_builder *build, int64_t x) function in typeref:typename:nir_ssa_def *
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| H A D | nir_lower_io.c | 908 return nir_imm_int64(b, var->data.driver_location);
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| H A D | radv_query.c | 170 nir_store_var(&b, result, nir_imm_int64(&b, 0), 0x1); 204 nir_ssa_def *start_done = nir_ilt(&b, nir_load_var(&b, start), nir_imm_int64(&b, 0)); 205 nir_ssa_def *end_done = nir_ilt(&b, nir_load_var(&b, end), nir_imm_int64(&b, 0)); 502 store->src[0] = nir_src_for_ssa(nir_imm_int64(&b, 0)); 577 nir_vec2(&b, nir_imm_int64(&b, 0), 578 nir_imm_int64(&b, 0)), 0x3);
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| /xsrc/external/mit/MesaLib.old/dist/src/compiler/nir/ |
| H A D | nir_lower_int64.c | 318 return lower_isub64(b, nir_imm_int64(b, 0), x); 616 return nir_bcsel(b, nir_ieq(b, r, nir_imm_int64(b, 0)), nir_imm_int64(b, 0),
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| H A D | nir_builder.h | 345 nir_imm_int64(nir_builder *build, int64_t x) function in typeref:typename:nir_ssa_def *
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| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| H A D | brw_nir_rt_builder.h | 391 inst_leaf_ptr = nir_imm_int64(b, 0);
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| /xsrc/external/mit/MesaLib/dist/src/compiler/nir/tests/ |
| H A D | load_store_vectorizer_tests.cpp | 1822 create_indirect_load(nir_var_mem_ssbo, 0, nir_imm_int64(b, 0x100000000), 0x1); 1823 create_indirect_load(nir_var_mem_ssbo, 0, nir_imm_int64(b, 0x200000004), 0x2);
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| /xsrc/external/mit/MesaLib/dist/src/microsoft/compiler/ |
| H A D | dxil_nir.c | 848 nir_ssa_def *ptr = nir_imm_int64(b, (uint64_t)var->data.binding << 32);
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| /xsrc/external/mit/MesaLib/dist/src/amd/common/ |
| H A D | ac_nir_lower_ngg.c | 181 nir_ssa_def *dot_op = !use_dot ? NULL : nir_ushr(b, nir_ushr(b, nir_imm_int64(b, 0x0101010101010101), shift), shift);
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